rf5c15 ETC-unknow, rf5c15 Datasheet - Page 7

• Manufacturer Part Number: rf5c15
• Description: Real-time Clock
• Manufacturer: ETC-unknow

• ADJ (BANK1, Address 1h, D
• MODE register (BANK1/0, Address Dh)
• 12/24 select register (BANK1, Address Ah)
• Leap year counter (BANK1, Address Bh)
• RESET controller/16Hz · 1Hz clock register. (BANK1/0, Address Fh)
• Test register (BANK1/0, Address Eh)
*
*
*
Bit for correcting the second digit. When set to 1,
1) For digits ranging from 00 to 29 : Resets the lower-order counter than the 1-second counter and sets the second
2) For digits ranging from 30 to 59 : Resets the lower-order counter than the 1-second counter, sets the second
D
Set the 10-hour counter as D
(D
(0, 0) repeatedly in the same timing as the year counter.
D
D
D
D
Register used for LSI inspection. Recommended setting is (D
) Addresses 0h to Dh are applicable both for Read and Write.
) Addresses Eh to Fh are applicable only for Write.
) When the Timer EN is set to 0, the 1-second counter and higher-order counters than the 1-second counter stop. If any carrying occurs in the lower-
0
0
1
2
3
order counters than the 1-second counter while the Timer EN is 0, carrying will be held and avoided until the Timer EN changes from 0 to 1. Thus, no
apparent delay is produced when the duration of the Timer EN = 0 is less than one second.
=1 sets to 24-hour system ; D
=1 : Resets all alarm registers.
=1 : Resets divider stages for seconds or smaller units.
=0 : 16Hz clock pulse ON.
=0 : 1Hz clock pulse ON.
1
, D
Timer EN Alarm EN
0
)=(0, 0) sets the counter for leap years. The counter value changes in the order of (0, 0) (0, 1) (1, 0) (1, 1)
D
3
D
2
1
=1 for p.m., D
0
0
=0 sets to 12-hour system.
D
)
1
digit to 00.
digit to 00 and increments the minute digit by 1.
BANK1/0
D
1
=0 for a.m.
0
1: BANK1 : Setting and reading of alarm, 12-hour/24-hour,
leap year, clock output selection and adjust operation.
0: BANK0 : Setting and reading of time
1: Alarm output enable
0: Alarm output disable
1: Counting time starts ; 0 : the 1-second counter and
(Note that 16Hz or 1Hz signals are not affected.)
higher-order counters than the 1-second counter stop*
3
, D
2
, D
1
, D
0
)=(0, 0, 0, 0)
RP/RF/RJ5C15
7