74VCX16374MTDX Fairchild Semiconductor, 74VCX16374MTDX Datasheet

IC FLIP FLOP 16BIT D LV 48TSSOP

74VCX16374MTDX

Manufacturer Part Number
74VCX16374MTDX
Description
IC FLIP FLOP 16BIT D LV 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74VCXr
Type
D-Type Busr
Datasheet

Specifications of 74VCX16374MTDX

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
8
Frequency - Clock
250MHz
Delay Time - Propagation
1.5ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
VCX
Technology
CMOS
Number Of Bits
16
Number Of Elements
2
Clock-edge Trigger Type
Positive-Edge
Polarity
Non-Inverting
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Package Type
TSSOP
Propagation Delay Time
18.4ns
Low Level Output Current
24mA
High Level Output Current
-24mA
Frequency (max)
250MHz
Operating Supply Voltage (min)
1.2V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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© 2005 Fairchild Semiconductor Corporation
74VCX16374G
(Note 2)(Note 3)
74VCX16374MTD
(Note 3)
74VCX16374
Low Voltage 16-Bit D-Type Flip-Flops
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and output enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
The 74VCX16374 is designed for low voltage (1.2V to
3.6V) V
The 74VCX16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Ordering Code:
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number
CC
applications with I/O compatibility up to 3.6V.
Package Number
BGA54A
MTD48
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
DS500066
Features
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
value of the resistor is determined by the current-sourcing capability of the
driver.
1.2V to 3.6V V
3.6V tolerant inputs and outputs
t
Power-off high impedance inputs and outputs
Supports live insertion and withdrawal (Note 1)
Static Drive (I
Uses patented noise/EMI reduction circuitry
Latch-up performance exceeds 300 mA
ESD performance:
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
PD
3.0 ns max for 3.0V to 3.6V V
r
Human body model
Machine model
24 mA @ 3.0V V
Package Descriptions
OH
CC
/I
OL
supply operation
!
)
200V
CC
CC
!
2000V
through a pull-up resistor; the minimum
October 1997
Revised June 2005
CC
www.fairchildsemi.com

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74VCX16374MTDX Summary of contents

Page 1

... Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: Ordering code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol © 2005 Fairchild Semiconductor Corporation Features 1.2V to 3.6V V supply operation CC 3 ...

Page 2

Connection Diagrams Pin Assignment for TSSOP Pin Assignment for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW Clock Pulse Input n I –I Inputs –O Outputs 0 ...

Page 3

Functional Description The 74VCX16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte func- tioning identically, but independent of the other. The control pins can be shorted together ...

Page 4

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATED  Outputs Active (Note 5) 0. Input Diode Current ( ...

Page 5

DC Electrical Characteristics Symbol Parameter V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ I Power-OFF Leakage Current OFF I Quiescent Supply Current Increase in I per Input CC CC ...

Page 6

AC Electrical Characteristics Symbol Parameter t Hold Time Pulse Width Output to Output Skew C OSHL t (Note 9) OSLH C Note 8: For add approximately 300 ps to ...

Page 7

AC Loading and Waveforms (V TEST PLH PHL PZL PLZ PZH PHZ FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low ...

Page 8

AC Loading and Waveforms (V TEST PLH PHL PZL PLZ PZH PHZ FIGURE 8. Waveform for Inverting and Non-Inverting Functions FIGURE 9. 3-STATE Output High Enable and Disable Times for Low ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Body Width Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild ...

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