ds1743p-c01 Maxim Integrated Products, Inc., ds1743p-c01 Datasheet

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ds1743p-c01

Manufacturer Part Number
ds1743p-c01
Description
Y2k-compliant, Nonvolatile Timekeeping Rams
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
www.maxim-ic.com
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
FEATURES
Integrated NV SRAM, Real-Time Clock,
Crystal, Power-Fail Control Circuit, and
Lithium Energy Source
Clock Registers are Accessed Identically to
the Static RAM. These Registers Reside in
the Eight Top RAM Locations.
Century Byte Register
Totally Nonvolatile with Over 10 Years of
Operation in the Absence of Power
BCD-Coded Century, Year, Month, Date,
Day, Hours, Minutes, and Seconds with
Automatic Leap Year Compensation Valid
through 2099
Low-Battery-Voltage Level Indicator Flag
Power-Fail Write Protection Allows for ±10%
V
Lithium Energy Source is Electrically
Disconnected to Retain Freshness Until
Power is Applied for the First Time
DIP Module Only
Standard JEDEC Bytewide 8k x 8 Static
PowerCap Module Board Only
Surface-Mountable Package for Direct
Replaceable Battery (PowerCap)
Power-On Reset Output
Pin-for-Pin Compatible with Other Densities
Underwriters Laboratories (UL) Recognized
to Prevent Charging of the Internal Lithium
Battery
CC
RAM Pinout
Connection to PowerCap Containing
Battery and Crystal
of DS174XP Timekeeping RAM
Power-Supply Tolerance
Y2K-Compliant, Nonvolatile Timekeeping
1 of 16
PIN CONFIGURATIONS
TOP VIEW
GND
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
N.C.
N.C.
N.C.
RST
V
WE
OE
CE
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
GND
N.C.
DQ0
DQ1
DQ2
34-Pin PowerCap Module Board
A12
(Uses DS9034PCX PowerCap)
28-Pin Encapsulated Package
A7
A6
A5
A4
A3
A2
A1
A0
X1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(28 PIN 740)
DS1743/DS1743P
GND
DS1743P
DS1743
V
BAT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
X2
V
WE
CE2
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
CC
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
REV
RAMs
: 090407
N.C.
N.C.
N.C.
N.C.
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

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ds1743p-c01 Summary of contents

Page 1

... A10 DQ7 DQ0 11 18 DQ6 DQ1 12 17 DQ5 DQ2 13 16 DQ4 GND 14 15 DQ3 28-Pin Encapsulated Package (28 PIN 740 DS1743P GND ...

Page 2

... DQ1 13 14 DQ2 14 17 GND 15 13 DQ3 16 12 DQ4 17 11 DQ5 18 10 DQ6 19 9 DQ7 DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs FUNCTION PDIP No Connection Address Input Data Input/ Output — Ground — Data Input/ — Output PIN ...

Page 3

... When V for the system to stabilize. These features prevent loss of data from unpredictable system operation brought on by low V as errant access and update cycles are avoided. CC DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs VOLTAGE PIN-PACKAGE 28 EDIP Module 28 EDIP Module 28 EDIP Module ...

Page 4

... This design allows the PowerCap to be mounted on top of the DS1743P after the completion of the surface-mount process. Mounting the PowerCap after the surface- mount process prevents damage to the crystal and battery due to the high temperatures required for solder reflow ...

Page 5

... LSB of the seconds register will toggle at 512Hz. When the seconds register is being read, the DQ0 line will toggle at the 512Hz frequency as long as conditions for access remain valid (i.e., CE low, OE low, WE high, and address for seconds register remain valid and stable). DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs Dallas Semiconductor DS1743 ...

Page 6

... AA changed while CE and OE remain valid, output data will remain valid for output data hold time (t will then go indeterminate until the next address access. DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs DATA ...

Page 7

... This bit is not writeable and should always when read ever present, an exhausted lithium energy source is indicated and both the contents of the RTC and RAM are questionable. DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs WR prior to the end of write and remain valid for t ...

Page 8

... Output Leakage Current (Any Output) Output Logic 1 Voltage (I = -1.0mA) OUT Output Logic 0 Voltage (I = 2.1mA) OUT Write-Protection Voltage Battery Switchover Voltage DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs TEMP RANGE 3.3V ±10 ±10% 0°C to +70°C 3.3V ±10 ±10% -40°C to +85°C SYMBOL CONDITIONS = 5V ±10 ...

Page 9

... SYMBOL Read Cycle Time Address Access Time CE to CE2 to DQ Low-Z CE Access Time CE2 Access Time CE and CE2 Data-Off Time Low-Z OE Access Time OE Data-Off Time Output Hold from Address DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN CC1 I CC2 ...

Page 10

... Address Access Time CE and CE2 Low to DQ Low-Z CE and CE2 Access Time CE and CE2 Data-Off time OE Low to DQ Low-Z OE Access Time OE Data-Off Time Output Hold from Address READ CYCLE TIMING DIAGRAM DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs ACCESS 120ns SYMBOL MIN MAX MIN t 120 ...

Page 11

... Write Cycle Time Address Setup Time WE Pulse Width CE and CE2 Pulse Width Data Setup Time Data Hold Time CE Data Hold Time CE2 Address Hold Time WE Data-Off Time Write Recovery Time DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs ACCESS 70ns MIN MAX MIN ...

Page 12

... WRITE CYCLE TIMING—WRITE-ENABLE CONTROLLED (See Note 5) WRITE CYCLE TIMING— CE /CE2-CONTROLLED (See Note 5) DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs ...

Page 13

... PF(MAX) PF(MIN) V Fall Time PF(MIN Rise Time PF(MIN) PF(MAX) Power-Up Recover Time Expected Data-Retention Time (Oscillator On) POWER-UP/DOWN TIMING (5V DEVICE) DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN TYP 300 REC ...

Page 14

... CC PF(MIN) PF(MAX) to RST High V PF Expected Data-Retention Time (Oscillator On) POWER-UP/DOWN WAVEFORM TIMING (3.3V DEVICE) CAPACITANCE (T = +25°C) A PARAMETER Capacitance on All Input Pins Capacitance on All Output Pins DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs SYMBOL MIN TYP 300 REC t 10 ...

Page 15

... Post-solder cleaning with water-washing techniques is acceptable, provided that ultrasonic vibration is not used. See the PowerCap package drawing for details regarding the PowerCap package. DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs applies ...

Page 16

... The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor. DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs DOCUMENT NO. ...

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