ds2740 Maxim Integrated Products, Inc., ds2740 Datasheet - Page 7

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ds2740

Manufacturer Part Number
ds2740
Description
Ds2740 High-precision Coulomb Counter
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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MEMORY
The DS2740 has memory space with registers for instrumentation, status, and control. When the MSB of
a two-byte register is read, both the MSB and LSB are latched and held for the duration of the Read Data
command to prevent updates during the read and ensure synchronization between the two register bytes.
For consistent results, always read the MSB and the LSB of a two-byte register during the same Read
Data command sequence.
Table 3. MEMORY MAP
STATUS REGISTER
The format of the status register is shown in Figure 5. The function of each bit is described in detail in the
following paragraphs.
Figure 5. STATUS REGISTER FORMAT
SMOD —SLEEP Mode Enable. A value of 1 allows the DS2740 to enter Sleep mode when DQ is low for
2s. A value of 0 disables DQ related transitions to Sleep mode. The power-up default of SMOD = 0.
RNAOP —Read Net Address Opcode. A value of 0 in this bit sets the opcode for the Read Net Address
command to 33h, while a 1 sets the opcode to 39h. The power-up default of RNAOP = 0.
X —Reserved bits.
ADDRESS (HEX)
09 to 0D
12 to FF
02 to 07
DS2740U
DS2740BU
0E
00
01
08
0F
10
11
PART
BIT 7
X
SMOD
Reserved
Status Register
Reserved
Special Feature Register
Reserved
Current Register MSB
Current Register LSB
Accumulated Current Register MSB
Accumulated Current Register LSB
Reserved
BIT 6
±204.8mVh
V
IS1
- V
IS2
BIT 5
X
DESCRIPTION
±10.24Ah
RNAOP
20m Ω
ADDRESS 01 h
BIT 4
7 of 16
ACR RANGE
BIT 3
±13.65Ah
X
15m Ω
BIT 2
R
X
SNS
±20.48Ah
10m Ω
BIT 1
X
READ/WRITE
±40.96Ah
BIT 0
R/W
R/W
R/W
R/W
5m Ω
X
R
R

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