74VHC574M Fairchild Semiconductor, 74VHC574M Datasheet - Page 2

• Manufacturer Part Number: 74VHC574M
• Description: IC F/F OCTAL D-TYPE 3ST 20-SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74VHCr
• Type: D-Type Busr

Specifications of 74VHC574M

• Function: Standard
• Output Type: Tri-State Non Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 180MHz
• Delay Time - Propagation: 5.6ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Number Of Circuits: 8
• Logic Family: 74VHC
• Logic Type: D-Type Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 16.7 ns
• High Level Output Current: - 8 mA
• Low Level Output Current: 8 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 2 V
• Flip-flop Type: D
• Propagation Delay: 7.5ns
• Frequency: 180MHz
• Output Current: 8mA
• Ic Output Type: Tri State Non Inverted
• Supply Voltage Range: 2V To 5.5V
• Rohs Compliant: Yes
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Package Type: SOIC W
• Frequency (max): 75MHz
• Operating Supply Voltage (min): 2V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

www.fairchildsemi.com
Functional Description
The VHC574 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CP) transition.
With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Truth Table
H
L
X

Z
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
LOW-to-HIGH Transition
D
H
X
L
n
Inputs
CP


X
OE
H
L
L
Outputs
O
H
L
Z
n