MBM29F400TC Fujitsu Media Devices, MBM29F400TC Datasheet

MBM29F400TC

Manufacturer Part Number

MBM29F400TC

Description

4M (512K X 8/256K X 16) BIT

Manufacturer

Fujitsu Media Devices

Datasheet

1.MBM29F400TC.pdf (47 pages)

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FUJITSU SEMICONDUCTOR

FLASH MEMORY

CMOS

4M (512K

MBM29F400TC

Embedded Erase

FEATURES

• Single 5.0 V read, write, and erase

• Compatible with JEDEC-standard commands

• Compatible with JEDEC-standard world-wide pinouts

• Minimum 100,000 write/erase cycles

• High performance

• Sector erase architecture

• Boot Code Sector Architecture

• Embedded Erase

• Embedded Program

• Data Polling and Toggle Bit feature for detection of program or erase cycle completion

• Ready/Busy output (RY/BY)

• Low Vcc write inhibit

• Erase Suspend/Resume

• Hardware RESET pin

• Sector protection

• Temporary sector unprotection

DATA SHEET

Minimizes system level power requirements

Uses same software commands as E

48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)

44-pin SOP (Package suffix: PF)

55 ns maximum access time

One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes.

Any combination of sectors can be concurrently erased. Also supports full chip erase.

T = Top sector

B = Bottom sector

Automatically pre-programs and erases the chip or any sector

Automatically writes and verifies data at specified address

Hardware method for detection of program or erase cycle completion

Suspends the erase operation to allow a read in another sector within the same device

Resets internal state machine to the read mode

Hardware method disables any combination of sectors from write or erase operations

Temporary sector unprotection via the RESET pin.

and Embedded Program

Algorithms

3.2 V

are trademarks of Advanced Micro Devices, Inc.

-55/-70/-90

PROMs

8/256K

/MBM29F400BC

16) BIT

DS05-20851-4E

-55/-70/-90

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