MBM29F033C Fujitsu Media Devices, MBM29F033C Datasheet
MBM29F033C
Available stocks
Related parts for MBM29F033C
MBM29F033C Summary of contents
Page 1
... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 32M (4M MBM29F033C FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection • 40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type) • ...
Page 2
... MBM29F033C -70/-90/-12 PACKAGE 40-pin plastic TSOP (I) Marking Side (FPT-40P-M06) 2 40-pin plastic TSOP (I) Marking Side (FPT-40P-M07) ...
Page 3
... GENERAL DESCRIPTION The MBM29F033C is a 32M-bit, 5.0 V-Only Flash memory organized as 4M bytes of 8 bits each. The 2M bytes of data is divided into 64 sectors of 64K bytes for flexible erase capability. The 8 bit of data will appear The MBM29F033C is offered in a 40-pin TSOP package. This device is designed to be programmed in- 7 system with the standard system 5 ...
Page 4
... MBM29F033C -70/-90/-12 FLEXIBLE SECTOR-ERASE ARCHITECTURE • Sixty four 64K byte sectors • 16 sector groups each of which consists of 4 adjacent sectors in the following pattern; sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31, 32-35, 36-39, 40-43, 44-47, 48-51, 52-55, 56-59, and 60-63. • Individual-sector or multiple-sector erase capability • Sector group protection is user-definable 1FFFFFH SA31 64K byte 1EFFFFH SA30 64K byte ...
Page 5
... — RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch X-Decoder -70/-90/-12 MBM29F033C — — -90 -12 90 120 90 120 Input/Output Buffers STB Data Latch Y-Gating Cell Matrix 5 ...
Page 6
... MBM29F033C -70/-90/-12 CONNECTION DIAGRAMS N.C. 11 RESET ...
Page 7
... Refer to the section on Sector Group Protection. MBM29F033C Table 1 MBM29F033C Pin Configuration Pin RY/BY Hardware Reset Pin/Sector Protection RESET N. MBM29F033C User Bus Operations ...
Page 8
... MBM29F033C -70/-90/-12 ORDERING INFORMATION Standard Products Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F033 C -70 DEVICE NUMBER/DESCRIPTION MBM29F033 32 Mega-bit (4M 5.0 V-only Read, Write, and Erase 64K Bytes (64 Sectors) 8 PTN PACKAGE TYPE PTN = 40-Pin Thin Small Outline Package ...
Page 9
... FUNCTIONAL DESCRIPTION Read Mode The MBM29F033C has two control functions which must be satisfied in order to obtain data at the outputs the power control and should be used for a device selection the output control and should be used to gate data to the output pins if a device is selected. ...
Page 10
... XX02H with the higher order address bits A the desired sector group address, the device will return 01H for a protected sector group and 00H for a non- protected sector group. Table 3 MBM29F033C Sector Protection Verify Autoselect Codes Type ...
Page 11
... SA21 0 1 SA22 0 1 SA23 0 1 SA24 0 1 SA25 0 1 SA26 0 1 SA27 0 1 SA28 0 1 SA29 0 1 SA30 0 1 SA31 0 1 MBM29F033C Sector Address Table ...
Page 12
... MBM29F033C -70/-90/-12 (Continued SA32 1 0 SA33 1 0 SA34 1 0 SA35 1 0 SA36 1 0 SA37 1 0 SA38 1 0 SA39 1 0 SA40 1 0 SA41 1 0 SA42 1 0 SA43 1 0 SA44 1 0 SA45 1 0 SA46 1 0 SA47 1 0 SA48 1 1 SA49 1 1 SA50 ...
Page 13
... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Group Protection The MBM29F033C features hardware sector group protection. This feature will disable both program and erase operations in any combination of sixteen sector groups of memory. Each sector group consists of four adjacent sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31, 32-35, 36- 39, 40-43, 44-47, 48-51, 52-55, 56-59, and 60-63 (see Table 5) ...
Page 14
... MBM29F033C -70/-90/-12 To verify programming of the protection circuitry, the programming equipment must force V with CE and and ( will produce a logical “1” code at device output DQ produce 00H for unprotected sector. In this mode, the lower order addresses, except for A care. Address locations with also possible to determine if a sector group is protected in the system by writing an Autoselect command ...
Page 15
... Temporary Sector Group Unprotection This feature allows temporary unprotection of previously protected sector groups of the MBM29F033C device in order to change data. The Sector Group Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sector groups can be programmed or erased by selecting the sector group addresses ...
Page 16
... MBM29F033C -70/-90/-12 Read/Reset Command The read or reset operation is initiated by writing the read/reset command sequence into the command register. Microprocessor read cycles retrieve array data from the memory. The device remains enabled for reads until the command register contents are altered. The device will automatically power-up in the read/reset state. In this case, a command sequence is not required to read data ...
Page 17
... Data polling must be performed at an address within any of the sectors being erased. Figure 16 illustrates the Embedded Erase MBM29F033C TM Algorithm using typical command strings and bus operations. , Sector Erase Timer.) Any command other than Sector 3 is “ ...
Page 18
... MBM29F033C -70/-90/-12 Erase Suspend The Erase Suspend command allows the user to interrupt a Sector Erase operation and then perform data reads from or programs to a sector not being erased. This command is applicable ONLY during the Sector Erase operation which includes the time-out period for sector erase. The Erase Suspend command will be ignored if ...
Page 19
... DQ 7 Data Polling The MBM29F033C device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program produce the complement of the data last written attempt to read the device will produce the true data last written to DQ Algorithm, an attempt to read the device will produce a “ ...
Page 20
... DQ 6 Toggle Bit I The MBM29F033C also features the “Toggle Bit I” method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device at any address will result in DQ Erase Algorithm cycle is completed, DQ attempts ...
Page 21
... RY/BY Ready/Busy The MBM29F033C provides a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the device is busy with either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase operation ...
Page 22
... Flash memory. Data Protection The MBM29F033C is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completions of specific multi-bus cycle command sequences ...
Page 23
... V Supply Voltages for MBM29F033C-70 ..................................................... +4. +5. Supply Voltages for MBM29F033C-90/-12 ............................................... +4. 5. Operating ranges define those limits between which the functionality of the device is guaranteed. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...
Page 24
... MBM29F033C -70/-90/-12 MAXIMUM OVERSHOOT +0.8 V –0.5 V –2.0 V Figure +2.0 V Figure 2 +13.5 V +13 +0 Note: This waveform is applied for A Figure Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform OE, and RESET. 9 Maximum Positive Overshoot Waveform ...
Page 25
... DC operating current and the frequency dependent component CC (at 6 MHz). The frequency component typically is 2 mA/MHz, with active while Embedded Algorithm (program or erase progress Applicable to sector protection function – not exceed MBM29F033C Test Conditions Max ...
Page 26
... MBM29F033C -70/-90/-12 AC CHARACTERISTICS • Read Only Operations Characteristics Parameter Symbols JEDEC Standard t t Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output Delay GLQV Chip Enable to Output High-Z EHQZ ...
Page 27
... Write Pulse Width (Note 2) WPP — Setup Time to WE Active (Note 2) OESP — Setup Time to WE Active (Note 2) CSP — t Recover Time From RY/BY RB MBM29F033C Description -70 Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. ...
Page 28
... MBM29F033C -70/-90/-12 (Continued) Parameter Symbols JEDEC Standard — t RESET Hold Time Before Read RH — t Program/Erase Valid to RY/BY Delay BUSY — t Rise Time to V VIDR — t RESET Pulse Width RP Notes: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection operation. 28 Description Min ...
Page 29
... SWITCHING WAVEFORMS • Key to Switching Waveforms WAVEFORM High Table Waveforms for Read Operations MBM29F033C INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from ...
Page 30
... MBM29F033C -70/-90/- RESET High Table Waveforms for Read Operations Addresses Stable t ACC Output Valid ...
Page 31
... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. Figure 6 Alternate WE Controlled Program Operation Timings MBM29F033C Data Polling WHWH1 ...
Page 32
... MBM29F033C -70/-90/- GHEL CE Data Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. ...
Page 33
... GHWL WPH AAH Data t VCS V CC Note the sector address for Sector Erase. Addresses = Figure 8 AC Waveforms Chip/Sector Erase Operations MBM29F033C XXXH XXXH XXXH 55H 80H AAH H for Chip Erase. -70/-90/-12 SA 55H 10H/30H 33 ...
Page 34
... MBM29F033C -70/-90/- Valid Data (The device has completed the Embedded operation). 7 Figure 9 AC Waveforms for Data Polling During Embedded Algorithm Operations CE t OEH WE t OES OE Data ( Stops Toggling (The device has completed the Embedded operation). ...
Page 35
... CE WE RY/BY Figure 11 RY/BY Timing Diagram During Program/Erase Operations WE RESET t RP RY/BY Figure 12 RESET Timing Diagram MBM29F033C The rising edge of the last WE signal Entire programming or erase operations t BUSY READY -70/-90/-12 35 ...
Page 36
... MBM29F033C -70/-90/- Data t VCS V CC SGA = Sector Group Address for initial sector X SGA = Sector Group Address for next sector Y Figure 13 36 SGA X t VLHT VLHT OESP WPP ...
Page 37
... Erase Suspend Read Toggle DQ and with OE Note read from the erase-suspended sector. 2 MBM29F033C Program or Erase Command Sequence VLHT Unprotection period Temporary Sector Group Unprotection Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 15 DQ vs. DQ ...
Page 38
... MBM29F033C -70/-90/-12 EMBEDDED ALGORITHMS Increment Address Figure 16 38 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command): H/AAH H/55H H/A0H Program Address/Program Data Embedded Programming Algorithm ...
Page 39
... Note: To insure the command has been accepted, the system software should check the status of DQ prior to and following each subsequent sector erase command the second status check, the command may not have been accepted. Figure 17 MBM29F033C Start Write Erase Command Sequence (See Below) Data Polling or Toggle Bit ...
Page 40
... MBM29F033C -70/-90/-12 Note rechecked even Start V = Byte address for programming Read Byte A ( Any of the sector addresses Addr Yes = Any of the sector group address DQ = Data Yes Read Byte ( Addr Yes DQ = Data ...
Page 41
... Read Byte (DQ Addr. = “H” or “L” Read Byte (DQ Addr. = “H” or “L” DQ Note rechecked even “1” because changing to “1”. Figure 19 MBM29F033C Start Toggle 6 ? Yes = 1? 5 Yes Toggle 6 ? Yes Fail ...
Page 42
... MBM29F033C -70/-90/-12 Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed Figure 20 42 Start Set Up Sector Addr PLSCNT = RESET = V IL Activate WE Pulse Time out 100 should remain V 9 Read from Sector ...
Page 43
... Perform Erase or Program Operations Temporary Sector Unprotection Completed Notes: 1. All Protected sector groups unprotected. 2. All previously protected sector groups are protected once again. Figure 21 Temporary Sector Group Unprotection Algorithm MBM29F033C Start RESET = V ID (Note 1) RESET = V IH (Note 2) -70/-90/-12 43 ...
Page 44
... MBM29F033C -70/-90/-12 ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle TSOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN1 C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A 44 Limits Min ...
Page 45
... INDEX 20 19.00±0.20 (.748±.008) 0.15±0.05 0.10(.004) (.006±.002) 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1994 FUJITSU LIMITED F40008S-1C-1 C MBM29F033C Details of "A" part 40 "A" 0.15(.006) 0.25(.010) 21 0.05(.002)MIN (STAND OFF) 10.00±0.20 (.394±.008) 0.50(.0197) TYP 9.50(.374) REF. 0.50± ...
Page 46
... MBM29F033C -70/-90/-12 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division ...