LTC6902 Linear Technology, LTC6902 Datasheet - Page 10

• Manufacturer Part Number: LTC6902
• Description: Multiphase Oscillator
• Manufacturer: Linear Technology

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LTC6902
THEORY OF OPERATIO
by 90 degrees, OUT3 lags OUT2 by 90 degrees and OUT4
lags OUT3 by 90 degrees. The signals are generated by
flip-flops. The output frequency is the programmable
divider’s output further divided 4 (M = 4).
The multiphase mode is determined by the state of the PH
input (Pin 3). Tie the PH pin to GND or drive it below 0.5V
to select the 2-phase mode. The PH pin may be floated or
driven to midsupply to select the 3-phase mode. The
4-phase mode is selected by tying the PH pin to V
driving it to within 0.4V of V
The CMOS output drivers have an ON resistance that is
typically less than 100 . In the 1 (high frequency) mode,
the rise and fall times are typically 7ns with a 5V supply and
11ns with a 3V supply. These transition times maintain a
clean square wave at 10MHz (20MHz at 5V supply). In the
lower, slew rate control circuitry in the output driver in-
creases the rise/fall times to typically 14ns for a 5V supply
and 19ns for a 3V supply. The reduced slew rate lowers EMI
(electromagnetic interference) and supply bounce.
Spread Spectrum Frequency Modulation
The LTC6902 provides the additional feature of spread
spectrum frequency modulation (SSFM). The oscillator’s
frequency is modulated by a pseudorandom noise (PRN)
signal to spread the oscillator’s energy over a wide fre-
quency band. This spreading decreases the peak electro-
magnetic radiation levels and improves electromagnetic
compatibility (EMC) performance.
The amount of frequency spreading is determined by the
external resistor R
MOD pins (V
voltage (V
signal generated by a multiplying digital to analog con-
verter (MDAC) referenced to V
negates errors due to variations of the V
locks the two voltages together. The V
V
digital code sent to the MDAC from the pseudorandom
binary sequence (PRBS) generator. V
pseudorandom noise-like manner. The (V
age is 0V minimum and maximally one fifth (20%) of
(V
10
10 and 100 modes, where the output frequency is much
SET
+
– V
voltage scaled by one fifth and multiplied by the
SET
SET
).
), the MOD pin voltage (V
+
– V
MOD
MOD
and the voltage between the V
). Unlike the stationary SET pin
+
.
SET
. Referencing to V
U
MOD
MOD
MOD
SET
+
) is a dynamic
voltage is the
– V
voltage and
varies in a
MOD
) volt-
+
+
and
SET
or
Referencing V
R
Consider the case when R
when the (V
I
its maximum frequency (f
quency set by the R
(V
V
master oscillator is at its minimum frequency (f
which is 80% of the f
resistor. The general formula for the amount of frequency
spreading is below:
where frequency spreading is defined as:
The design procedure is to first choose the R
value to set f
value to set the amount of frequency spreading desired.
Note that the frequency is always modulated to a lower
value. This is often referred to as a down spread signal.
To disable the SSFM, connect the MOD pin to ground.
Grounding the MOD pin disables the modulation and shuts
down the modulation circuitry. While leaving the MOD pin
open, R
is not a good method of disabling the modulation. The
open pin is susceptible to external noise coupling that can
affect the output frequency accuracy. Grounding the MOD
pin is the best way to disable the SSFM.
As stated previously the modulating waveform is a pseu-
dorandom noise-like waveform. The pseudorandom signal
is generated by a linear feedback shift register that is 9 bits
long. The pseudorandom sequence will repeat every 512
(2
shift register are sent in parallel to the MDAC which pro-
duces the V
the output is not a perfectly smooth waveform but consists
of 128 (2
MOD
MOD
SET
9
+
Frequency Spreading (in %) = 20 •
Frequency Spreading (in %) = 100 •
) shift register clock cycles. The bottom seven bits of the
– V
), I
= 0A, I
to determine the amount of frequency spreading.
MOD
MOD
MOD
7
) discrete steps that change every shift register
MOD
) voltage is at its maximum of 20% of (V
MASTER
MAX
= , gives a frequency spreading of 0%, this
+
= 0.2 • I
– V
MOD
voltage. Being a digitally generated signal,
(f
MOD
OUT
to V
= I
SET
) and then choose the R
SET
) voltage is at its minimum of 0V,
SET
OSC
resistor. Furthermore, when the
SET
, I
and the master oscillator is at
MASTER
MAX
SET
allows the ratio of R
frequency set by the R
) which is the f
is equal to R
= 0.8 • I
R
R
MOD
f
SET
MAX
MOD
SET
SET
MOD
f
MAX
– f
OUT
and the
resistor
resistor
. Here,
SET
MIN
MIN
fre-
6902f
SET
+
to
–
)