LTC1289 Linear Technology, LTC1289 Datasheet - Page 7

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LTC1289

Manufacturer Part Number
LTC1289
Description
3 Volt Single Chip 12-Bit Data Acquisition System
Manufacturer
Linear Technology
Datasheet

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PI FU CTIO S
BLOCK DIAGRAM
#
1 – 8
9
10
11
12
13,14 REF
15
16
17
18
19
20
U
PIN
CH0 – CH7
COM
DGND
AGND
V
CS
D
D
SCLK
ACLK
V
CC
OUT
IN
, REF
U
+
V
D
CC
IN
COM
FUNCTION
Analog Inputs
Common
Digital Ground
Analog Ground
Negative Supply
Reference Inputs
Chip Select Input
Digital Data Output
Digital Input
Shift Clock
A/D Conversion Clock
Positive Supply
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
20
17
U
1
2
3
4
5
6
7
8
9
DGND
10
INPUT MUX
REGISTER
ANALOG
INPUT
SHIFT
AGND
11
DESCRIPTION
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single-ended inputs. It must be free of noise and
is usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
AGND should be tied directly to the analog ground plane.
Tie V
The reference inputs must be kept free of noise with respect to AGND.
A logic low on this input enables data transfer.
The A/D conversion result is shifted out of this output.
The A/D configuration word is shifted into this input.
This clock synchronizes the serial data transfer.
This clock controls the A/D conversion process.
This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
SAMPLE
HOLD
AND
to the most negative potential in the circuit. (Ground in single supply applications.)
V
12
COMP
REF
CAPACITIVE
13
12-BIT
DAC
REF
14
+
REGISTER
CONTROL
OUTPUT
TIMING
12-BIT
SHIFT
AND
SAR
LTC1289 BD
18
16
19
15
SCLK
D
ACLK
CS
OUT
LTC1289
7

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