N02L83W2A ON Semiconductor, N02L83W2A Datasheet
N02L83W2A
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N02L83W2A Summary of contents
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... Ultra-Low Power Asynchronous CMOS SRAM 256K × 8 bit Overview The N02L83W2A is an integrated memory device containing a 2 Mbit Static Random Access Memory organized as 262,144 words by 8 bits. The device is designed and fabricated using ON Semiconductor’s advanced CMOS technology to provide both high-speed performance and ultra-low power ...
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... N02L83W2A Functional Block Diagram Word Address Address Inputs Decode 0 3 Logic Page Address Address Inputs Decode 4 17 Logic CE1 CE2 Control WE Logic OE Functional Description CE1 CE2 When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally ...
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... N02L83W2A Absolute Maximum Ratings Item Voltage on any pin relative to V Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time 1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied ...
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... N02L83W2A Power Savings with Page Mode Operation ( Page Address (A4 - A17) Word Address (A0 - A3) CE1 CE2 OE Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature ...
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... N02L83W2A Timing Test Conditions Item Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load Operating Temperature Timing Item Read Cycle Time Address Access Time Chip Enable to Valid Output Output Enable to Valid Output Chip Enable to Low-Z output ...
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... N02L83W2A Timing of Read Cycle (CE1 = Address Previous Data Valid Data Out Timing Waveform of Read Cycle (WE=V Address CE1 CE2 OE High-Z Data Out , WE = CE2 = OLZ Rev Page www.onsemi.com www.DataSheet4U.com ) Data Valid ...
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... N02L83W2A Timing Waveform of Write Cycle (WE control) Address CE1 CE2 WE High-Z Data In Data Out Timing Waveform of Write Cycle (CE1 Control) Address CE1 (for CE2 Control, use inverted signal) WE Data In Data Out Data Valid t WHZ High ...
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... N02L83W2A 32-Lead TSOP-I Package (T32) 8.0±0.10 DETAIL B 0.20 0.00 Note: 1. All dimensions in millimeters 2. Package dimensions exclude molding flash 18.40±0.10 20.0±0.20 1.10±0.15 0.80mm REF Rev Page www.onsemi.com www.DataSheet4U.com 0.50mm REF 0.27 0.17 SEE DETAIL ...
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... N02L83W2A 32-Lead STSOP-I Package (N32) 11.80±0.10 8.0±0.10 13.40±0.20 DETAIL B 0.20 0.00 Note: 1. All dimensions in millimeters 2. Package dimensions exclude molding flash 0.50mm REF 0.27 0.17 1.10±0.15 0.80mm REF Rev Page www.onsemi.com www.DataSheet4U.com SEE DETAIL ...
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... Part Number Package N02L83W2AT5I Leaded 32-TSOP I N02L83W2AT25I Green 32-TSOP I (RoHS Compliant) N02L83W2AN5I Leaded 32-sTSOP I N02L83W2AN25I Green 32-sTSOP I (RoHS Compliant) N02L83W2AT5IT Leaded 32-TSOP I N02L83W2AT25IT Green 32-TSOP I (RoHS Compliant) N02L83W2AN5IT Leaded 32-sTSOP I N02L83W2AN25IT Green 32-sTSOP I (RoHS Compliant) Revision History Revision # Date A Jan 2001 B ...