HEF4013BT,652 NXP Semiconductors, HEF4013BT,652 Datasheet - Page 8

IC FLIP FLOP DUAL D TYPE 14SOIC

HEF4013BT,652

Manufacturer Part Number
HEF4013BT,652
Description
IC FLIP FLOP DUAL D TYPE 14SOIC
Manufacturer
NXP Semiconductors
Series
4000Br
Type
D-Typer
Datasheets

Specifications of HEF4013BT,652

Package / Case
14-SOIC (3.9mm Width), 14-SOL
Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
40MHz
Trigger Type
Positive Edge
Current - Output High, Low
3.4mA, 3.4mA
Voltage - Supply
3 V ~ 15 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
HE4000B
Logic Type
D-Type Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
90 ns
High Level Output Current
- 4.2 mA
Low Level Output Current
4.2 mA
Supply Voltage (max)
15 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
3 V
Technology
CMOS
Number Of Bits
2
Number Of Elements
2
Clock-edge Trigger Type
Positive-Edge
Operating Supply Voltage (typ)
3.3/5/9/12V
Package Type
SO
Frequency (max)
40MHz
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
15V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Delay Time - Propagation
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1685-5
933372660652
HEF4013BTD
NXP Semiconductors
Table 9.
Table 10.
HEF4013B_6
Product data sheet
Supply voltage
V
5 V to 15 V
Supply voltage
V
5 V to 15 V
Fig 5.
Fig 6.
DD
DD
Recovery times are shown as positive values but may be specified as negative values.
Measurement points are given in
nSD, nCD recovery time and pulse width
Test and measurement data is given in
Definitions test circuit:
DUT = Device Under Test.
R
C
Test circuit for measuring switching times
T
L
Measurement points
Test data
= Termination resistance should be equal to output impedance Z
= Load capacitance including jig and probe capacitance.
input nCD
Input
V
0.5V
input nCP
input nSD
output nQ
M
DD
V
Input
V
V
V
0 V
0 V
0 V
OH
OL
I
SS
V
V
V
I
I
I
or V
DD
Table
V
M
t
G
W
Table
9.
V
Rev. 06 — 27 October 2009
I
V
0.5V
10;
Output
M
V
M
DD
R T
t
rec
DUT
V
DD
t
r
, t
20 ns
f
V
O
o
of the pulse generator.
V
C L
M
t
V
0.1V
W
001aag182
X
DD
t
rec
001aag088
Load
C
50 pF
L
HEF4013B
V
0.9V
Dual D-type flip-flop
Y
© NXP B.V. 2009. All rights reserved.
DD
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