ATF20V8B-10XC ATMEL Corporation, ATF20V8B-10XC Datasheet - Page 7

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ATF20V8B-10XC

Manufacturer Part Number
ATF20V8B-10XC
Description
High- Performance EE PLD
Manufacturer
ATMEL Corporation
Datasheet
Compiler Mode Selection
Note:
ATF20V8B Registered Mode
PAL Device Emulation / PAL Replacement
The registered mode is used if one or more registers are
required. Each macrocell can be configured as either a reg-
istered or combinatorial output or I/O, or as an input. For a
registered output or I/O, the output is enabled by the OE
pin, and the register is clocked by the CLK pin. Eight prod-
uct terms are allocated to the sum term. For a combinato-
rial output or I/O, the output enable is controlled by a
product term, and seven product terms are allocated to the
Registered Mode Operation
ABEL, Atmel-ABEL
CUPL
LOG/iC
OrCAD-PLD
PLDesigner
Tango-PLD
1. Only applicable for version 3.4 or lower.
Registered
P20V8R
G20V8MS
GAL20V8_R
“Registered”
P20V8
G20V8
(1)
Complex
P20V8C
G20V8MA
GAL20V8_C7
“Complex”
P20V8
G20V8
sum term. When the macrocell is configured as an input,
the output enable is permanently disabled.
Any register usage will make the compiler select this mode.
The following registered devices can be emulated using
this mode:
20R8 20RP8
20R6 20RP6
20R4 20RP4
(1)
Simple
P20V8
G20V8
GAL20V8_C8
“Simple”
P20V8
G20V8
(1)
Auto Select
P20V8
G20V8A
GAL20V8
GAL20V8
P20V8
G20V8
7

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