SN7325 Si-En, SN7325 Datasheet - Page 11

• Manufacturer Part Number: SN7325
• Description: Multi Function I/O Driver
• Manufacturer: Si-En

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Slave Address
The SN7325 has a 7-bit slave address. The 8th bit
following the 7-bit slave address is the R/W
bit low for a write command and high for a read
command.
The complete slave address is:
Data Bus Transaction
The command byte is the first byte to follow the 8-bit
device slave address during a write transmission (see
Table 2). The command byte is used to determine which
of the following registers are written or read.
Acknowledge
The acknowledge bit is a clocked 9th bit the recipient
uses to acknowledge receipt of each byte of data (see
Figure 4). Each byte transferred effectively requires 9bits.
The master generates the 9th clock pulse, and the
recipient pulls down SDA during the acknowledge clock
pulse, such that the SDA line is stable low during the
high period of the clock pulse. When the master is
transmitting to the SN7325, the device generates the
acknowledge bit because the SN7325 is the recipient.
When the SN7325 is transmitting to the master, the
master generates the acknowledge bit because the master
is the recipient.
Configuration Registers
The configuration registers configure the directions of
the I/O pins. Set the bit in the respective configuration
register to enable the corresponding port as an input.
Clear the bit in the configuration register to enable the
corresponding port as an output.
Interrupt Control Registers
The interrupt control registers control the interrupt
function of I/O ports when the I/O port used as input. Set
the bit in the respective interrupt control register to
disable the corresponding port’s interrupt function. Clear
the bit in the interrupt control register to enable the
corresponding port’s interrupt function.
Writing to Port Registers
Transmit data to the SN7325 by sending the device slave
address and setting the LSB to a logic zero. The
command byte is sent after the address and determines
which registers receive the data following the command
byte.
A write to either output port groups of the SN7325 starts
with the master transmitting the group’s slave address
with the R/W
one or more bytes of data. The SN7325 acknowledges
these subsequent bytes of data and updates the
corresponding group’s ports with each new byte until the
master issues a STOP condition (Figure 5).
Jan. 2009, Ver1.0
A6
1
A5
____
0
bit set low. The master can now transmit
A4
1
A3
1
A2
0
____
AD1
A1
bit. Set this
AD0
A0
11
Reading Port Registers
To read the device data, the bus master must first send
the SN7325 address with the R/ W
followed by the command byte, which determines which
register is accessed. After a restart, the bus master must
then send the SN7325 address with the R/W
Data from the register defined by the command byte is
then sent from the SN7325 to the master.
The SN7325 acknowledges the slave address, and
samples the ports during the acknowledge bit. INT
desserts during the slave address acknowledge. When the
master reads one byte from the I/O ports of the SN7325
and subsequently issues a STOP condition (Figure 6), the
SN7325 transmits the current port data, clears the change
flags, and resets the transition detection. INT
during the slave acknowledge. The new snapshot data is
the current port data transmitted to the master, and
therefore, port changes occurring during the transmission
are detected.
Port Output Signal-Level Translation
The open-drain output architecture allows for level
translation to higher or lower voltages than the SN7325’s
supply. Each of the push-pull output ports has protection
diodes to V+ and GND. When a port output is driven to a
voltage higher than V+ or lower than GND, the
appropriate protection diode clamps the output to a diode
drop above V+ or below GND. When the SN7325 is
powered down (V+ = 0V), every output port’s protection
diodes to V+ and GND continue to appear as a diode
clamp from each output to GND (Figure 7). Each of the
I/O ports OD0~OD7 has a protection diode to GND
(Figure 8). When a port is driven to a voltage lower than
GND, the protection diode clamps the port to a diode
drop below GND. To obtain a high voltage , Open-Drain
I/O Ports should connect an resistance to Vcc(Figure 8).
Figure 8.SN7325 Open-Drain I/O Ports Structure
Figure 7
Output
Output
Input
Input
.
SN7325 Push-Pull I/O Ports Structure
V+
GND
GND
____
SI-EN technology
OD0~OD7
PP0~PP7
100k
Vcc
bit set to zero,
____
SN7325
_______
bit set to 1.
desserts
_______