AN2438 Freescale Semiconductor / Motorola, AN2438 Datasheet - Page 13

• Manufacturer Part Number: AN2438
• Description: ADC Definitions and Specifications
• Manufacturer: Freescale Semiconductor / Motorola

Synchronous Noise Offset Error
Reducing Random Noise Error
MOTOROLA
The worst particular type of noise with regards to ADC performance is
synchronous noise, or noise that occurs with the same signature at the same
relative time in the ADC conversion process on repetitive conversions. One
common example of such noise is the microcontroller’s bus clock noise, if the
ADC is synchronous to the bus. Other examples include I/O drivers controlling
other board-level functions that in turn control the analog input.
In the case of synchronous noise, the same noise error, see
with each conversion. This can appear to be an offset error, instead of the
variable errors typically associated with noise. In some cases, this could
appear as a gain error, if the noise coupling is dependent on the voltage
difference between the input and one of the supplies or references.
Changing the ADC conversion time relative to the synchronous noise can
reduce Synchronous Noise Offset (after all other noise reduction techniques
have been used). This is most practical if the noise source is low frequency. If
the noise source is the microcontroller bus clock (or based thereupon) and the
ADC is synchronous to the bus, the only option is to operate in Wait mode.
Random noise has the same signature as shown above, but has a random
timing relationship with respect to the ADC conversion process. Noise of this
type includes single events (very slow switching signals), EMC events, line
noise, and white noise. A similar form of noise includes asynchronous noise,
such as communication devices running asynchronous to the ADC clock such
as SPI’s. The magnitude of the noise error (as described in
type must have a uniform distribution across ADC samples (either truly random
or white) or it is at least partially synchronous.
Random noise can be divided into the following types relative to the ADC
conversion cycle (the entire cycle must be considered, not just the individual
sample/compare windows):
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Single Event, Returns to Zero in Less than 1 Conversion Cycle —
Since the noise error on subsequent conversions is 0LSB, the effective
noise error can be reduced to less than ¼LSB by sampling four times for
every 1LSB of noise error. This is the type of noise expected from
occasional I/O switching or other low-frequency switching events.
Single Event, Returns to Zero in X Conversion Cycles — For an
unknown return-to-zero waveform to be reduced to ¼LSB, the input
must be sampled 4*X times for every 1LSB of noise error. If the
waveform is predictable, the maximum noise error (therefore, the
number of cycles required to average it out) can be reduced. This type
ADC Definitions and Specifications
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Synchronous Noise Offset Error
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AN2438/D
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