IDT72215LB25PFI IDT, Integrated Device Technology Inc, IDT72215LB25PFI Datasheet - Page 8

IC FIFO 512X18 SYNC 25NS 68-TQFP

IDT72215LB25PFI

Manufacturer Part Number
IDT72215LB25PFI
Description
IC FIFO 512X18 SYNC 25NS 68-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
7200r
Datasheet

Specifications of IDT72215LB25PFI

Function
Synchronous
Memory Size
9.2K (512 x 18)
Data Rate
40MHz
Access Time
25ns
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-TQFP, 68-VQFP
Configuration
Dual
Density
9Kb
Access Time (max)
15ns
Word Size
18b
Organization
512x18
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
40MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
60mA
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72215LB25PFI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72215LB25PFI
Manufacturer:
IDT
Quantity:
57
Part Number:
IDT72215LB25PFI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72215LB25PFI
Manufacturer:
IDT
Quantity:
259
Part Number:
IDT72215LB25PFI
Manufacturer:
IDT
Quantity:
20 000
Part Number:
IDT72215LB25PFI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72215LB25PFI8
Manufacturer:
IDT
Quantity:
259
write cycle, the Half-Full Flag goes LOW and will remain set until the difference
between the write pointer and read pointer is less than or equal to one half of
the total memory of the device. The Half-Full Flag (HF) is then reset to HIGH
by the LOW-to-HIGH transition of the Read Clock (RCLK). The HF is
asynchronous.
the previous device. This output acts as a signal to the next device in the Daisy
Chain by providing a pulse when the previous device writes to the last location
of memory.
NOTES:
1. After reset, the outputs will be LOW if OE = 0 and tri-state if OE = 1.
2. The clocks (RCLK, WCLK) can be free-running during reset.
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
After half of the memory is filled, and at the LOW-to-HIGH transition of the next
In the Daisy Chain Depth Expansion mode, WXI is connected to WXO of
,
,
Q
0
,
- Q
,
,
17
t
t
t
RSF
RSF
RSF
t
RS
Figure 4. Reset Timing
t
RSS
8
READ EXPANSION OUT (RXO)
(RXI) is connected to Read Expansion Out (RXO) of the previous device. This
output acts as a signal to the next device in the Daisy Chain by providing a pulse
when the previous device reads from the last location of memory.
DATA OUTPUTS (Q0-Q17)
TM
In the Daisy Chain Depth Expansion configuration, Read Expansion In
Q
0
-Q
17
(2)
are data outputs for 18-bit wide data.
t
RSR
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
= 1
= 0
OCTOBER 22, 2008
(1)
2766 drw 06

Related parts for IDT72215LB25PFI