CY2318ANZ Cypress Semiconductor, CY2318ANZ Datasheet - Page 5

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CY2318ANZ

Manufacturer Part Number
CY2318ANZ
Description
3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs
Manufacturer
Cypress Semiconductor
Datasheet

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4
Document #: 38-07181 Rev. *B
Switching Characteristics
Switching Waveforms
Duty Cycle Timing
All Outputs Rise/Fall Time
Output-Output Skew
t
t
t
t
t
t
t
Parameter
3
4
5
6
7
8
9
Notes:
4. All parameters specified with loaded outputs.
5. Duty cycle of input clock is 50%. Rising and falling edge rate is greater than 1 V/ns.
OUTPUT
OUTPUT
OUTPUT
Maximum Operating Frequency
Duty Cycle
Rising Edge Rate
Falling Edge Rate
Output to Output Skew
SDRAM Buffer LH Prop. Delay
SDRAM Buffer HL Prop. Delay
SDRAM Buffer Enable Delay
SDRAM Buffer Disable Delay
t
0.4V
3
1.5V
2.4V
1.5V
t
5
[3, 5]
Name
t
= t
2
1.5V
[3]
1.5V
[3]
2
[4]
÷ t
t
1
1
[3]
2.4V
0.4V
t
4
[3]
[3]
1.5V
[3]
[3]
Measured at 1.5V
Measured between 0.4V and 2.4V
Measured between 2.4V and 0.4V
All outputs equally loaded
Input edge greater than 1 V/ns
Input edge greater than 1 V/ns
Input edge greater than 1 V/ns
Input edge greater than 1 V/ns
Test Conditions
3.3V
0V
Min.
45.0
0.9
0.9
1.0
1.0
1.0
1.0
Typ.
50.0
150
1.5
1.5
3.5
3.5
20
5
CY2318ANZ
Max.
55.0
100
250
4.0
4.0
5.0
5.0
12
30
Page 5 of 9
MHz
V/ns
V/ns
Unit
ps
ns
ns
ns
ns
%

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