DS1085L Maxim Integrated Products, DS1085L Datasheet
DS1085L
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DS1085L Summary of contents
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... A 2-wire serial interface allows in-circuit, on-the-fly programming of the master oscillator, prescalers (P0 and P1), and divider (N). This allows dynamic frequency modification, if required, or, for fixed-frequency applications, the DS1085L can be used with factory- or user-programmed values. EconOscillator is a trademark of Dallas Semiconductor. ...
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... Figure 1. DS1085L BLOCK DIAGRAM OVERVIEW A block diagram of the DS1085L is shown in Figure 1. The DS1085L consists of five major components: § Internal master oscillator (33MHz to 66MHz) § Master oscillator control DAC § Prescalers (divide-by- § ...
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... PART NUMBER DS1085LZ-5 DS1085LZ-12 DS1085LZ-25 For further description of use of the OFFSET register see the REGISTER FUNCTIONS section. The master clock can be routed directly to the outputs (OUT0 and OUT1) or through separate prescalers (P0 and P1). In the case of OUT1, an additional programmable divider (N) can be used to generate frequencies down to 4 ...
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Table 2. DEVICE MODE USING OUT0 EN0 SEL0 PDN0 (BIT) (BIT) (BIT This mode is for applications where OUT0 is not ...
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... Correct operation of the device is not guaranteed for values of OFFSET not shown in Table 6. LSB MSB DS1085LZ-12 Frequency DAC Offset 52.3MHz 600 Second Data Byte DS1085LZ-25 Frequency DAC OS 50.9MHz 500 O2 O1 LSB X X Offset OS LSB O0 ...
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... EN0 0M1 0M0 DS1085LZ-25 FREQUENCY RANGE — — — — 19.2 to 44.8 22.4 to 48.0 25.6 to 51.2 28.8 to 54.4 32.0 to 57.6 35.2 to 60.8 38.4 to 64.0 41.6 to 67.2 44.8 to 70.4 48.0 to 73.6 51.2 to 76.8 54.4 to 80.0 57.6 to 83.2 LSB MSB 1M1 1M0 DIV1 – – – – – – 0 ...
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The functions of the individual bits are described in the following paragraphs. DIV1 (Default Setting = 0) This bit allows the output of the prescaler routed directly to the OUT1 pin (DIV1 = 1). In this condition, ...
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Table 7a. PRESCALER P0 DIVISOR M SETTINGS 0M1 0M0 PRESCALER P0 DIVISOR “M” *Factory Default Setting Table 7b. PRESCALER P1 DIVISOR M SETTINGS 1M1 1M0 PRESCALER P1 DIVISOR “M” ...
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N The DIV word sets the programmable divider. These 10 bits (N0–N9) determine the value of the programmable divider (N). The range of divisor values is from two to 1025, and is equal to the programmed value of N plus ...
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... DS1085L issues an acknowledge, and then the master can send data to the DS1085L. If the DS1085L read, the master must send the command protocol as before, and then issue a repeat START condition and then the control byte again, this time with the R/ the data from the DS1085L ...
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Access RANGE [37h the next data bytes read are the values stored in the RANGE register. This register has a 14- W bit value. The upper eight bits are sent first, followed by a second byte ...
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... When the DS1085L EEPROM is being written to not able to perform additional responses. In this case, the slave DS1085L sends a not acknowledge to any data transfer request made by the master. It resumes normal operation when the EEPROM operation is complete ...
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... Slave transmitter mode: The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmitted on SDA by the DS1085L while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer. ...
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... A control byte is the first byte received following the START condition from the master device. The control byte consists of a 4-bit control code; for the DS1085L, this is set as 1011 binary for read and write operations. The next three bits of the control byte are the device select bits (A2, A1, A0). The address bits to which the DS1085L responds are factory set to 000, but can be altered by writing new values to the ADDR register ...
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... Figure 4. 2-WIRE SERIAL COMMUNICATION WITH DS1085L ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated ...
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MASTER OSCILLATOR CHARACTERISTICS PARAMETER SYMBOL Master Oscillator Range Default Master Oscillator Frequency Master Oscillator Frequency Tolerance Voltage Frequency Variation Temperature Frequency Variation Integral Nonlinearity of Frequency DAC AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Frequency Stable After DIV Change Frequency Stable After ...
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AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE PARAMETER SYMBOL SCL Clock Frequency Bus Free Time Between a STOP and START Condition Hold Time (Repeated) START Condition LOW Period of SCL HIGH Period of SCL Setup Time for a Repeated START Data Hold ...
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DAC and OFFSET register settings must be configured to maintain the clock frequency within this range. Correct operation of the device is not guaranteed if these limits are exceeded. 8) Frequency settles faster for small charges in value. During ...
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... DIVISOR ( DS1085L-05 DS1085L-12 DS1085L- DS1085L-05 2.75V 3.3V 3.6V 800 1000 3.3V ±10 0°C to +70°C.) A SUPPLY CURRENT vs. VOLTAGE 14.0 12.0 10.0 8.0 6.0 4.0 2.0 DS1085L-12 DS1085L-05 0.0 2.75 3.00 3.25 VOLTAGE (V) SUPPLY CURRENT vs. DIVISOR 12 11 70C 200 400 600 800 DIVISOR (N) 3.50 1000 ...
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... FREQUENCY % CHANGE vs. SUPPLY VOLTAGE 2.0 DS1085L-12 1.5 DS1085L-05 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 2.70 2.95 3.20 VOLTAGE ( 1000 3. 3.3V ±10 0°C to +70°C.) A SUPPLY CURRENT vs. DIVISOR DS1085L-25 3 DS1085L-12 DS1085L- 200 400 600 800 DIVISOR (N) FREQUENCY % CHANGE vs. TEMPERATURE 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1 TEMPERATURE (°C) 1000 60 70 ...