BCM8705 Broadcom Corporation, BCM8705 Datasheet - Page 2

• Manufacturer Part Number: BCM8705
• Description: Serial 10-Gbe/Fibre Channel Transceiver
• Manufacturer: Broadcom Corporation

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Broadcom
and StrataXGS
States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the
property of their respective owners.
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2006 by BROADCOM CORPORATION. All rights reserved.
8705-PB02-R
The BCM8705 Ethernet/Fibre Channel/SONET LAN/WAN PHY is a
fully integrated serialization/deserialization (9.953/10.3125/
10.5188-Gbps) interface device performing the extension functions for a
10-gigabit serial Ethernet reconciliation sublayer (RS) interface. The
XGXS, PCS, and PMA functions include 8B/10B coding, 64B/66B
coding, SerDes, WIS, clock multiplication unit (CMU), and clock and
data recovery (CDR).
For WAN applications, a WIS-compliant framer with flexible clocking
modes allows transmission of Ethernet traffic over a WAN network.
®
, the pulse logo, Connecting everything
®
are among the trademarks of Broadcom Corporation and/or its affiliates in the United
04/17/06
External VCXO
interface
outputs
Control
inputs
Status
2-Wire
JTAG
XAUI
XAUI
and
®
PEXTCLKP/N
XEXTCLKP/N
REFCLKOUT
CONFIG[1:0]
X[A:D]OP/N
PRTAD[4:0]
X[A:D]IP/N
PVCOXP/N
PLOSB/A1
TXONOFF
SYSRSTB
PCMULK
XPDOUT
PCDRLK
PPDOUT
2WENB
TRSTB
®
RSTB
MDIO
JTCK
MDC
LASI
, the Connecting everything logo, EyeOpener
SDA
TMS
TDO
SCL
TDI
BCM8705 Fully Integrated Interface
System/MAC Interface
Differential CML
AC-coupled
internally biased
differential CML
AC-coupled
internally biased
differential LVPECL
CMOS
CMOS
O V E R V I E W
XAUI
PMD
®
On-chip clock synthesis is performed by the high-frequency low-jitter
phase-locked loops for the PMD and XAUI output retimers. Individual
PMD and XAUI clock recovery is performed on the device by
synchronizing directly to their respective incoming data streams. Elastic
buffers are provided to allow the XAUI and PMD interfaces to operate
in asynchronous configuration. Only an external 155.52/156.25/
159.38-MHz oscillator is required for the reference clock input.
The BCM8705 is available in a 13-mm × 13-mm, 256-pin FBGA with a
0.8-mm ball pitch and also in a 17-mm x 17-mm, 256-pin 1-mm ball
pitch RoHS-compliant package.
Line/Fiber-Optic Module Interface
,
internally biased
Differential CML
differential CML
PMD Analog
AC-coupled
CMOS
PDIP/N
PCOP/N
PDOP/N
VCPCDR
VCNCDR
OPTXENB0/1
OPTXRST0/1
OPRXLOS
OPBIASFLT
OPTMPFLT
OPPWFLT
OPTXFLT
OPRXFLT
OPOUTLVL
OPINLVL
Phone: [phone]
Fax: [phone]
E-mail: [e-mail]
Web: www.broadcom.com
10G Serial
Inputs
10G Serial
Outputs
CDR Loop
Filter
Optics
Control
and
Status