MC10E136FNR2 ON Semiconductor, MC10E136FNR2 Datasheet - Page 9

• Manufacturer Part Number: MC10E136FNR2
• Description: IC COUNTER U/D 6BIT UNIV 28-PLCC
• Manufacturer: ON Semiconductor
• Series: 10Er

Specifications of MC10E136FNR2

• Logic Type: Binary Counter
• Direction: Up, Down
• Number Of Elements: 1
• Number Of Bits Per Element: 6
• Reset: Asynchronous
• Timing: Synchronous
• Count Rate: 650MHz
• Trigger Type: Positive Edge
• Voltage - Supply: 4.2 V ~ 5.7 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

CLOCK
COUT
becomes simply determining what value to load into the
counter to accomplish the desired division. Since the load
operation requires a clock pulse, to divide by N, N−1 must
be loaded into the counter. A single E136 device is capable
of divide ratios of 2 to 64 inclusive, Table 1 outlines the load
values for the various divide ratios. Figure 4 presents the
waveforms resulting from a divide by 37 operation. Note
that the availability of the COUT complementary output
COUT allows the user to choose the polarity of the divide by
output.
counter is probably a better choice than the E136. The E016
has an internal feedback to control the reloading of the
counter, this not only simplifies board design but also will
result in a faster maximum count frequency.
CLOCK
The exercise of building a programmable divider then
For single device programmable counters the E016
S1
“LO”
“LO”
CIN
CLIN
CLK
Q0 −> Q5
D0 −> D5
LSB
OUT
CLOUT
COUT
LOAD
100100
S1
Figure 7. 24-bit Programmable Divider Architecture
100011
“LO”
Figure 6. Programmable Divider Waveforms
CIN
CLIN
CLK
Q0 −> Q5
D0 −> D5
100010
http://onsemi.com
CLOUT
COUT
• • •
• • •
• • •
S1
9
DIVIDE BY 37
000011
superiority of the E016 diminishes, and in fact for very wide
dividers the E136 will provide the capability of a faster count
frequency. This potential is a result of the cascading features
mentioned previously in this document. Figure 5 shows the
architecture of a 24-bit programmable divider implemented
using E136 counters. Note the need for one external gate to
control the loading of the entire counter chain. An ideal
device for the external gating of this architecture would be
the 4-input OR function in the 8-lead SOIC ECLinPS Lite™
family. However the final decision as to what device to use
for the external gating requires a balancing of performance
needs, cost and available board space. Note that because of
the need for external gating the maximum count frequency
of a given sized programmable divider will be less than that
of a single cascaded counter.
For programmable dividers of larger than 8 bits the
000010
CIN
CLIN
CLK
Q0 −> Q5
D0 −> D5
CLOUT
COUT
000001
S1
000000
CIN
CLIN
CLK
Q0 −> Q5
D0 −> D5
MSB
CLOUT
LOAD
COUT
S1