74ACTQ08 Fairchild Semiconductor, 74ACTQ08 Datasheet

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74ACTQ08

Manufacturer Part Number
74ACTQ08
Description
Quiet Series Quad 2-Input AND Gate
Manufacturer
Fairchild Semiconductor
Datasheet
© 1999 Fairchild Semiconductor Corporation
74ACTQ08
Quiet Series
General Description
The ACTQ08 contains four, 2-input AND gates and utilizes
Fairchild Quiet Series
put switching and improved dynamic threshold perfor-
mance. FACT Quiet Series
and undershoot corrector in addition to a split ground bus
for superior ACMOS performance.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
FACT , Quiet Series , FACT Quiet Series
Order Number
74ACTQ08SC
74ACTQ08SJ
74ACTQ08PC
Package Number
technology to guarantee quiet out-
IEEE/IEC
M14A
M14D
N14A
features GTO output control
Quad 2-Input AND Gate
and GTO
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
A
O
n
n
Pin Names
, B
are trademarks of Fairchild Semiconductor Corporation.
n
DS010891
Inputs
Outputs
Features
Connection Diagram
I
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Improved latch-up immunity
Outputs source/sink 24 mA
TTL-compatible inputs
CC
Description
reduced by 50%
Package Description
August 1990
Revised November 1999
www.fairchildsemi.com

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74ACTQ08 Summary of contents

Page 1

... Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74ACTQ08SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ08PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 3

AC Electrical Characteristics Symbol Parameter t Propagation Delay Data to Output PLH t Propagation Delay Data to Output PHL t Output to Output OSHL t Skew (Note 8) OSLH Note 7: Voltage Range 5.0 is 5.0V 0.5V. Note 8: Skew ...

Page 4

FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body Package Number M14A 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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