NCP5104 ON Semiconductor, NCP5104 Datasheet
NCP5104
Available stocks
Related parts for NCP5104
NCP5104 Summary of contents
Page 1
... NCP5104 High Voltage, Half Bridge Driver The NCP5104 is a High Voltage Power gate Driver providing two outputs for direct drive of 2 N-channel power MOSFETs or IGBTs arranged in a half-bridge configuration. It uses the bootstrap technique to insure a proper drive of the High-side power switch. Features • ...
Page 2
... GND 1 Vcc SG3526 2 IN MC34025 3 TL594 SD NCP1561 4 GND DRV_LO NCP5104 GND GND Figure 2. Typical Application Half Bridge Converter VCC VCC UV DETECT IN DEAD TIME GENERATION GND SD GND NCP5104 VBOOT 7 DRV_HI 6 Bridge 5 DRV_LO C6 Q2 GND GND VBOOT 7 DRV_HI ...
Page 3
... Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NCP5104 Description Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á ...
Page 4
... Parameter guaranteed by design OFF 3. Turn-off propagation delay @ Vbridge = 600 V is guaranteed by design. 4. See characterization curve for Dt parameters variation on the full range temperature. 5. Timing diagram definition see: Figure 4, Figure 5 and Figure 6. NCP5104 = -40°C < boot GND bridge ...
Page 5
... IN SD DRV_HI DRV_LO Note: DRV_HI output is in phase with the input 50% IN ton DRV_HI toff 90% DRV_LO 10% NCP5104 Figure 4. Input/Output Timing Diagram 50% tr toff 90% 90% Dead time 10% tf Ton = Toff + DT Figure 5. Timing Definitions http://onsemi.com 5 www.DataSheet4U.com tf 10% Dead time tr 90% ton 10% ...
Page 6
... IN DeadTime1 DRV_HI toff_LO 90% Matching Delay1=toff_HI-toff_LO DRV_LO Matching Delay 2=(toff_LO+DT1)-(toff_HI+DT2) Figure 6. Matching Propagation Delay Definition 50% SD DRV_HI DRV_LO Figure 7. Shutdown Waveform Definition NCP5104 50% toff_HI 90% 10% DeadTime2 50% tsd_en tsd_dis 90% 10% http://onsemi.com 6 www.DataSheet4U.com 10% ...
Page 7
... V VOLTAGE (V) BRIDGE Figure 12. High Side Turn ON Propagation Delay vs. V Voltage (V BRIDGE NCP5104 CHARACTERIZATION CURVES 900 850 800 750 700 650 600 550 500 450 400 18 20 -40 -20 Figure 9. Turn ON Propagation Delay vs. ) ...
Page 8
... Delay Matching -10 Delay Matching 2 -15 -20 -40 - TEMPERATURE (°C) Figure 18. Propagation Delay Matching Between High Side and Low Side Driver vs. Temperature NCP5104 CHARACTERIZATION CURVES 160 140 120 100 -40 - Figure 15. Turn ON Risetime vs. Temperature ) 60 50 ...
Page 9
... V , VOLTAGE (V) CC Figure 22. High Level Input Voltage Threshold vs. Supply Voltage (V CC 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0 VOLTAGE (V) CC Figure 24. Logic “0” Input Current vs. Supply Voltage ( NCP5104 CHARACTERIZATION CURVES 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 -40 -20 Figure 21. Low Level Input Voltage Threshold = V ) BOOT 2.5 2.0 1.5 1.0 0 -40 -20 Figure 23 ...
Page 10
... V , VOLTAGE (V) CC Figure 28. Low Level Output Voltage vs. Supply Voltage ( 1.6 1.2 0.8 0 VOLTAGE (V) CC Figure 30. High Level Output Voltage vs. Supply Voltage ( NCP5104 CHARACTERIZATION CURVES 10 8.0 6.0 4.0 2 -40 -20 Figure 27. Logic “1” Input Current vs. ) 1.0 0.8 0.6 0.4 0 -40 -20 Figure 29. Low Level Output Voltage vs. ...
Page 11
... HV PINS VOLTAGE (V) Figure 36. Leakage Current on High Voltage Pins (600 V) to Ground vs. V BRIDGE ( BRIDGE BOOT DRV_HI NCP5104 CHARACTERIZATION CURVES 400 High Side 350 I High Side src 300 I Low Side src 250 200 I Low Side src 150 ...
Page 12
... CC BOOT 10 9.8 9.6 9.4 9.2 V UVLO Startup CC 9.0 8.8 V UVLO Startup 8.6 BOOT 8.4 8.2 8.0 -40 - TEMPERATURE (°C) Figure 42. UVLO Startup Voltage vs. Temperature NCP5104 CHARACTERIZATION CURVES 100 -40 -20 Figure 39 BOOT 400 350 300 250 200 150 100 -40 -20 Supply Figure 41. V ...
Page 13
... GATE 100 200 300 400 SWITCHING FREQUENCY (kHz) Figure 46. I Consumption vs. Switching CC1 Frequency with 50 nC Load on Each Driver @ NCP5104 CHARACTERIZATION CURVES 40 C LOAD 5 100 500 600 Figure 45. I Frequency with 33 nC Load on Each Driver @ ...
Page 14
... G C SEATING PLANE - 0.25 (0.010 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NCP5104 PACKAGE DIMENSIONS SOIC-8 NB CASE 751-07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...
Page 15
... C 3.94 4.45 0.155 0.175 D 0.38 0.51 0.015 0.020 F 1.02 1.78 0.040 0.070 G 2.54 BSC 0.100 BSC H 0.76 1.27 0.030 0.050 J 0.20 0.30 0.008 0.012 K 2.92 3.43 0.115 0.135 L 7.62 BSC 0.300 BSC --- 10 --- 10 N 0.76 1.01 0.030 0.040 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NCP5104/D ...