MCP2122 Microchip Technology, MCP2122 Datasheet - Page 8

• Manufacturer Part Number: MCP2122
• Description: Converts serial data from UART bitstreams to IrDA standard bitstreams (encodes) and from IrDA standard bitstreams to UART bitstreams ...
• Manufacturer: Microchip Technology

MCP2122
2.4.1
The baud rate for the MCP2122 is determined by the
frequency of the 16XCLK signal. Equation 2-1
demonstrates how to calculate the 16XCLK frequency
based on the desired baud rate. Table 2-3 shows some
common baud rates and the corresponding 16XCLK
frequency.
EQUATION 2-1:
TABLE 2-3:
FIGURE 2-8:
DS21894B-page 8
9600
19,200
38,400
57,600
115,200
Baud
Rate
The following table shows the state on the RESET pin and how this effects the operation of the TXIR pin.
RESET State
V
V
F
IH
IL
16XCLK
BAUD RATE
153,600
307,200
614,400
921,600
1,843,200
Frequency
(F
16XCLK
16
COMMON BAUD RATE/
16XCLK FREQUENCY
XCLK
=
RX
TX
16 (Desired Baud Rate)
)
16XCLK FREQUENCY
MCP2122 RECEIVE DETECT TO ENCODER/DECODER BLOCK DIAGRAM
TXIR output encoded value of TX pin
TXIR is forced low
Comment
Decode
Encode
Preliminary
Pulse Width
Limiter
(~ 4 µs)
Comment
2.5
The IR encoder/decoder is made up of two major
components. They are:
• IR Decoder
• IR Encoder
The encoder receives UART data (bit by bit) and
outputs a data bit in the IrDA standard bit format.
Figure 2-8 shows a functional block diagram of the
encoder.
The decoder receives IrDA standard data (bit by bit)
and outputs data in UART data bit format. Figure 2-8
shows a functional block diagram of the decoder.
The encoder/decoder has two interfaces. They are:
• Host UART interface
• IR interface
2.5.1
Each bit time is comprised of 16 bit clocks. If the value
to be transmitted (as determined by the TX pin) is a
logic-low, the TXIR pin will output a low level for 7-bit
clock cycles, a logic-high level for 3-bit clock (with a
maximum high-time of about 4 µs) cycles, with the
remaining time (6-bit clock cycles or more) being low. If
the value to transmit is a logic-high, the TXIR pin will
output a low level for the entire 16 bit clock cycle.
2.5.2
Each bit time is comprised of 16 bit clocks. If the value
to be received is a logic-low, the RXIR pin will be a low
level for the first 3-bit clock cycle (or a minimum of
1.6 µs), with the remaining time (13-bit clock cycles)
being high. If the value to be received is a logic-high,
the RXIR pin will be a high level for the entire 16-bit
clock cycle. The level on the RX pin will be in the
appropriate state for an entire 16-bit clock cycle.
Glitch
Filter
Encoder/Decoder
ENCODING (MODULATION)
DECODING (DEMODULATION)
 2004 Microchip Technology Inc.
RXIR
TXIR