IDT5V993A Integrated Device Technology, IDT5V993A Datasheet

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IDT5V993A

Manufacturer Part Number
IDT5V993A
Description
3.3v Programmable Skew Pll Clock Driver Turboclock
Manufacturer
Integrated Device Technology
Datasheet

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• Ref input is 5V tolerant
• 3 pairs of programmable skew outputs
• Low skew: 200ps same pair, 250ps all outputs
• Selectable positive or negative edge synchronization:
• Synchronous output enable
• Output frequency: 3.75MHz to 85MHz
• 2x, 4x, 1/2, and 1/4 outputs
• 3 skew grades:
• 3-level inputs for skew and PLL range control
• PLL bypass for DC testing
• External feedback, internal loop filter
• 12mA balanced drive outputs
• Low Jitter: <200ps peak-to-peak
• Available in QSOP package
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
IDT5V993A
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
c
Excellent for DSP applications
IDT5V993A-2: t
IDT5V993A-5: t
IDT5V993A-7: t
2001
Integrated Device Technology, Inc.
SKEW0
SKEW0
SKEW0
<250ps
<500ps
<750ps
REF
FB
V
CCQ
PLL
FS
3
3.3V PROGRAMMABLE
SKEW PLL CLOCK DRIVER
TURBOCLOCK™
/PE
3
3
3
Select
Select
Select
Skew
Skew
Skew
1
GND/sO E
for high performance computing and data-communications applications. A
key feature of the programmable skew is the ability of outputs to lead or lag
the REF input signal. The IDT5V993A has six programmable skew outputs
and two zero skew outputs. Skew is controlled by 3-level input signals that
may be hard-wired to appropriate HIGH-MID-LOW levels.
enabled. However, if GND/sOE is held high, all the outputs except 3Q0 and
3Q1 are synchronously disabled.
synchronized with the positive edge of the REF clock input. When V
PE is held low, all the outputs are synchronized with the negative edge of
REF. Both devices have LVTTL outputs with 12mA balanced drive outputs.
3
3
3
The IDT5V993A is a high fanout 3.3V PLL based clock driver intended
When the GND/sOE pin is held low, all the outputs are synchronously
Furthermore, when the V
1F1:0
2F1:0
3F1:0
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
CCQ
1Q
1Q
2Q
2Q
3Q
3Q
4Q
4Q
/PE is held high, all the outputs are
0
1
0
1
0
1
0
1
IDT5V993A
DSC 5408/1
CCQ
/

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IDT5V993A Summary of contents

Page 1

... PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK™ The IDT5V993A is a high fanout 3.3V PLL based clock driver intended for high performance computing and data-communications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The IDT5V993A has six programmable skew outputs and two zero skew outputs ...

Page 2

... IDT5V993A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK REF /PE 6 CCQ QSOP TOP VIEW Pin Name Type Description REF I N Reference Clock Input ...

Page 3

... IDT5V993A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK By providing external feedback, the IDT5V993A gives users flexibility with regard to skew adjustment. The FB signal is compared with the input REF signal at the phase detector in order to drive the VCO. Phase differences cause the VCO of the PLL to adjust upwards or downwards accordingly ...

Page 4

... CC I Dynamic Power Supply Current per Output CCD I Total Power Supply Current TOT NOTE: 1. For eight outputs, each loaded with 20pF. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES IDT5V993A-5, -7 (Industrial) Min. Max. 3 3.6 -40 +85 Conditions Guaranteed Logic HIGH (REF, FB Inputs Only) Guaranteed Logic LOW (REF, FB Inputs Only) ...

Page 5

... SKEWPR the skew between outputs when they are selected for 0t SKEW0 5. For IDT5V993A measured with C SKEW0 L 6. There are 2 classes of outputs: Nominal (multiple the output-to-output skew between any two devices operating under the same conditions (V DEV 8 ...

Page 6

... IDT5V993A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES V CC 150 Outpu t 150 t ORISE 2.0V t PWH 0.8V t PWL LVTTL Output Waveform 1ns 3.0V 2.0V Vth = 1.5V 0.8V 0V LVTTL Input Test Waveform 6 20pF t OFALL 1ns ...

Page 7

... IDT5V993A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK REF D IVIDE REF D IVIDE NOTES: V /PE: The AC Timing Diagram applies to V CCQ CCQ negative edge of REF, and the positive edges of the divide-by-2 and the divide-by-4 signals align. ...

Page 8

... IDT5V993A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK XXXXX XX X IDT Device Type Package Process CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Com m ercial (0°C to +70°C) Blank Industrial (-40° +85° Quarter-Size Sm all outline Package 5V993A-2 3 ...

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