MACH110-12 Lattice, MACH110-12 Datasheet - Page 17

• Manufacturer Part Number: MACH110-12
• Description: High-Density EE CMOS Programmable Logic
• Manufacturer: Lattice

Input, I/O, or
SWITCHING WAVEFORMS
Registered
Feedback
Clock
Notes:
1. V
2. Input pulse amplitude 0 V to 3.0 V.
3. Input rise and fall times 2 ns–4 ns typical.
Output
Clock
T
= 1.5 V.
Asynchronous Reset
Input Register Clock Width
t
WICH
(MACH 2 and 4)
t
AR
Input, I/O, or
t
ARW
Feedback
Outputs
t
V
WICL
T
V
T
14127I-19
14127I-17
MACH110-12/15/20
V
t
ARR
V
T
T
t
ER
Output Disable/Enable
or Feedback
Registered
Input, I/O,
V
V
OL
OH
Output
Latch
Input
Gate
Clock
+
-
0.5V
0.5V
V
T
14127I-21
t
EA
V
Input Latch Gate Width
T
Asynchronous Preset
(MACH 2 and 4)
t
AP
t
APW
t
WIGL
V
T
V
T
V
T
14127I-18
14127I-20
t
V
APR
T
17