MACH1 Lattice, MACH1 Datasheet - Page 43

• Manufacturer Part Number: MACH1
• Description: High-Performance EE CMOS Programmable Logic
• Manufacturer: Lattice

100-PIN PQFP CONNECTION DIAGRAM (MACH221SP-7/10/12/15)
Top View
PIN DESIGNATIONS
I/CLK = Input or Clock
GND = Ground
I
I/O
V
CC
= Input
= Input/Output
= Supply Voltage
IO/CLK0
I1/CLK1
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
I/O16
I/O17
GND
GND
V
V
GND
GND
GND
GND
TCK
N/C
I/O6
I/O7
I/O8
I/O9
TDI
N/C
N/C
N/C
CC
CC
I7
I2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Block A
Block D
MACH 1 & 2 Families
100-Pin PQFP
TDI
TCK
TMS
TDO = Test Data Out
Block H
Block E
= Test Data In
= Test Clock
= Test Mode Select
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
GND
GND
TDO
N/C
I6
I/O41
N/C
I/O40
I/O39
I/O38
I/O37
I/O36
I5/CLK3
GND
GND
V
V
I4/CLK2
I/O35
I/O34
I/O33
I/O32
I/O31
N/C
I/O30
N/C
I3
TMS
GND
GND
CC
CC
14051K-026
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