74F191 Philips, 74F191 Datasheet - Page 2

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74F191

Manufacturer Part Number
74F191
Description
Up/down binary counter with reset and ripple clock
Manufacturer
Philips
Datasheet

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FEATURES
DESCRIPTION
The 74F191 is a 4-bit binary counter. It contains four edge-triggered
master/slave flip-flops with internal gating and steering logic to
provide asynchronous preset and synchronous count-up and
count-down operations.
Asynchronous parallel load capability permits the counter to be
preset to any desired number. Information present on the parallel
data inputs (D
outputs when the Parallel Load (PL) input is Low. This operation
overrides the counting function. Counting is inhibited by a High level
on the count enable (CE) input. When CE is Low, internal state
changes are initiated. Overflow/underflow indications are provided
by two types of outputs, the Terminal Count (TC) and Ripple Clock
(RC).
The TC output is normally Low and goes High when: 1) the count
reaches zero in the countdown mode or 2) reaches “15” in the count
up mode. The TC output will remain High until a state change
occurs, either by counting or presetting, or until U/D is changed. TC
output should not be used as a clock signal because it is subject to
decoding spikes. The TC signal is used internally to enable the RC
output. When TC is High and CE is Low, the RC follows the clock
pulse. The RC output essentially duplicates the Low clock pulse
width, although delayed in time by two gate delays.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20 A in the High state and 0.6mA in the Low state.
Philips Semiconductors
1995 Jul 17
D
CE
CP
PL
U/D
Q
RC
TC
High speed –125MHz typical f
Synchronous, reversible counting
4-Bit binary
Asynchronous parallel load capability
Cascadable without external logic
Single up/down control input
Up/Down binary counter with reset and ripple clock
0
0
- D
- Q
3
3
PINS
0
- D
3
) is loaded into the counter and appears on the
Data inputs
Count enable input (active Low)
Clock pulse input (active rising edge)
Asynchronous parallel load control input (active Low)
Up/down count control input
Flip-flop outputs
Ripple clock output (active low)
Terminal count output
MAX
DESCRIPTION
2
PIN CONFIGURATION
ORDERING INFORMATION
16-pin plastic DIP
16-pin plastic SO
DESCRIPTION
74F191
TYPE
TYPICAL f
GND
U/D
Q
Q
CE
Q
Q
D
1
0
2
3
125MHz
1
COMMERCIAL RANGE
1
2
3
4
5
6
7
8
T
amb
V
HIGH/LOW
74F(U.L.)
CC
MAX
1.0/1.0
1.0/3.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33
50/33
50/33
N74F191N
N74F191D
= 0 C to +70 C
= 5V 10%,
SF00729
16
15
14
13
12
11
10
9
SUPPLY CURRENT
V
D
CP
RC
TC
PL
D
D
CC
0
2
3
Product specification
TYPICAL
(TOTAL)
LOAD VALUE
853–0352 15459
40mA
1.0mA/20mA
1.0mA/20mA
1.0mA/20mA
20 A/0.6mA
20 A/1.8mA
20 A/0.6mA
20 A/0.6mA
20 A/0.6mA
HIGH/LOW
74F191
PKG DWG #
SOT109-1
SOT38-4

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