HEF4518BP,652 NXP Semiconductors, HEF4518BP,652 Datasheet - Page 2

• Manufacturer Part Number: HEF4518BP,652
• Description: IC BCD COUNTER DUAL 16DIP
• Manufacturer: NXP Semiconductors
• Series: 4000Br

Specifications of HEF4518BP,652

• Package / Case: 16-DIP (0.300", 7.62mm)
• Logic Type: BCD Counter
• Direction: Up
• Number Of Elements: 2
• Number Of Bits Per Element: 4
• Reset: Asynchronous
• Count Rate: 40MHz
• Trigger Type: Positive, Negative
• Voltage - Supply: 4.5 V ~ 15.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Counter Type: Binary Counters
• Logic Family: HEF4518B
• Number Of Bits: 4
• Counting Method: Synchronous
• Operating Supply Voltage: 3 V to 15 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Timing: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 933277660652; HEF4518BPN; HEF4518BPN

Philips Semiconductors
DESCRIPTION
T he HEF4518B is a dual 4-bit internally synchronous BCD
counter. The counter has an active HIGH clock input
(CP
outputs from all four bit positions (O
HIGH overriding asynchronous master reset input (MR).
The counter advances on either the LOW to HIGH
transition of the CP
PINNING
January 1995
CP
CP
MR
O
O
Dual BCD counter
0A
0B
0
0A
1A
A
) and an active LOW clock input (CP
to O
to O
, MR
, CP
, CP
3A
3B
B
0B
1B
Fig.1 Functional diagram.
clock inputs (L to H triggered)
clock inputs (H to L triggered)
master reset inputs
outputs
outputs
0
input if CP
1
is HIGH or the HIGH to
0
to O
1
3
), buffered
) and an active
2
LOW transition of the CP
or CP
the other clock input may be used as a clock enable input.
A HIGH on MR resets the counter (O
independent of CP
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
APPLICATION INFORMATION
Some examples of applications for the HEF4518B are:
FAMILY DATA, I
See Family Specifications
HEF4518BP(N):
HEF4518BD(F):
HEF4518BT(D):
( ): Package Designator North America
Multistage synchronous counting.
Multistage asynchronous counting.
Frequency dividers.
1
may be used as the clock input to the counter and
DD
Fig.2 Pinning diagram.
0
LIMITS category MSI
, CP
16-lead DIL; plastic (SOT38-1)
16-lead DIL; ceramic (cerdip) (SOT74)
16-lead SO; plastic (SOT109-1)
1
1
.
input if CP
Product specification
0
0
is LOW. Either CP
HEF4518B
to O
3
= LOW)
MSI
0