SM5903BF Nippon Precision Circuits Inc, SM5903BF Datasheet - Page 6

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SM5903BF

Manufacturer Part Number
SM5903BF
Description
compression and non compression type shock-proof memory controller
Manufacturer
Nippon Precision Circuits Inc
Datasheet
Note. When the memory system is OFF (through mode), the input data rate is synchronized to the system clock input (384fs), so input
AC characteristics
Standard voltage: V
Low-voltage: V
(*) Typical values are for fs = 44.1 kHz
System clock (CLK pin)
System clock input
Serial input (YSRDATA, YLRCK, YSCK pins)
Clock pulsewidth (HIGH level)
Clock pulsewidth (LOW level)
Last YSCK rising edge to YLRCK edge
YLRCK edge to first YSCK rising edge
data needs to be at 1/384 of this frequency. But, this IC can tolerate a certain amount of jitter. For details, refer to Through-mode
operation.
YSCK pulsewidth (HIGH level)
YSCK pulsewidth (LOW level)
Clock pulse cycle
YLRCK pulse frequency
Parameter
YSRDATA setup time
YSRDATA hold time
YSRDATA
YSCK pulse cycle
See note below.
DD1
YLRCK
Parameter
YSCK
CLK
= V
DD1
DD2
= V
= 2.4 to 3.0 V, V
DD2
= 3.0 to 3.6 V, V
Symbol
t
t
t
CWH
CWL
CY
t
t
CWH
DS
t
Symbol
SS
t
CY
t
BCWH
t
BCWL
t
t
t
t
BCY
DH
DS
BL
LB
= 0 V, Ta = -20 to 70 ˚C
SM5903BF
SS
t
t
BCWH
t
System clock
CWL
t
DH
= 0 V, Ta = -40 to 85 ˚C
Condition
BL
384fs
Min
150
75
75
50
50
50
50
fs
0
t
BCY
t
Rating
BCWL
t
Typ
LB
NIPPON PRECISION CIRCUITS-6
Min
Max
26
26
58
3fs
fs
0.5V
0.5V
0.5V
Rating
29.5
29.5
Typ
Unit
59
0.5V
ns
ns
ns
ns
ns
ns
ns
DD
DD
DD
DD
Memory system OFF
Memory system ON
Max
125
125
250
(MSON=H)
(MSON=L)
Condition
Unit
ns
ns
ns

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