74HC40103N,652 NXP Semiconductors, 74HC40103N,652 Datasheet

IC COUNTER 8BIT SYNC BIN 16DIP

74HC40103N,652

Manufacturer Part Number
74HC40103N,652
Description
IC COUNTER 8BIT SYNC BIN 16DIP
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet
1.74HC40103D652.pdf (25 pages)

Specifications of 74HC40103N,652

Package / Case
16-DIP (0.300", 7.62mm)
Logic Type
Binary Counter
Direction
Down
Number Of Elements
1
Number Of Bits Per Element
8
Reset
Asynchronous
Timing
Synchronous
Count Rate
32MHz
Trigger Type
Positive Edge
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Logic Family
74HC
Number Of Bits
8
Operating Supply Voltage
2 V to 6 V
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1445-5
74HC40103N
933669640652
1. General description
The 74HC40103 is a high-speed Si-gate CMOS device and are pin compatible with the
40103 of the 4000B series. The 74HC40103 is specified in compliance with JEDEC
standard no. 7A.
The 74HC40103 consists of an 8-bit synchronous down counter with a single output which
is active when the internal count is zero. The 74HC40103 contains a single 8-bit binary
counter and has control inputs for enabling or disabling the clock (CP), for clearing the
counter to its maximum count and for presetting the counter either synchronously or
asynchronously. All control inputs and the terminal count output (TC) are active-LOW
logic.
In normal operation, the counter is decremented by one count on each positive-going
transition of the clock (CP). Counting is inhibited when the terminal enable input (TE) is
HIGH. The terminal count output (TC) goes LOW when the count reaches zero if TE is
LOW, and remains LOW for one full clock period.
When the synchronous preset enable input (PE) is LOW, data at the jam input (P0 to P7)
is clocked into the counter on the next positive-going clock transition regardless of the
state of TE. When the asynchronous preset enable input (PL) is LOW, data at the jam
input (P0 to P7) is asynchronously forced into the counter regardless of the state of PE,
TE, or CP. The jam inputs (P0 to P7) represent a single 8-bit binary word.
When the master reset input (MR) is LOW, the counter is asynchronously cleared to its
maximum count (decimal 255) regardless of the state of any other input.
If all control inputs except TE are HIGH at the time of zero count, the counters will jump to
the maximum count, giving a counting sequence of 256 clock pulses long.
The 74HC40103 may be cascaded using the TE input and the TC output, in either a
synchronous or ripple mode.
74HC40103
8-bit synchronous binary down counter
Rev. 03 — 12 November 2004
Product data sheet

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74HC40103N,652 Summary of contents

Page 1

Rev. 03 — 12 November 2004 1. General description The 74HC40103 is a high-speed Si-gate CMOS device and are pin compatible with the 40103 of the 4000B series. The 74HC40103 is specified in compliance ...

Page 2

Philips Semiconductors 2. Features Cascadable Synchronous or asynchronous preset Low-power dissipation Complies with JEDEC standard no. 7A ESD protection: HBM EIA/JESD22-A114-B exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. Multiple package options Specified from +80 C and ...

Page 3

Philips Semiconductors 5. Ordering information Table 2: Ordering information Type number Package Temperature range 74HC40103N +125 C 74HC40103D +125 C 74HC40103DB +125 C 74HC40103PW +125 C 6. Functional ...

Page 4

Philips Semiconductors Fig 3. IEC logic symbol count Fig 4. Timing diagram 9397 750 13812 Product data sheet ...

Page 5

other 7 flip-flops TE Fig 5. Logic diagram ...

Page 6

Philips Semiconductors 7. Pinning information 7.1 Pinning Fig 6. Pin configuration 7.2 Pin description Table 3: Symbol GND 9397 750 13812 Product data sheet ...

Page 7

Philips Semiconductors 8. Functional description 8.1 Function table Table 4: Control inputs [ HIGH voltage level LOW voltage level don’t care. [2] Clock connected to CP. Synchronous operation: changes occur on ...

Page 8

Philips Semiconductors 10. Recommended operating conditions Table 6: Symbol amb 11. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = ...

Page 9

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter +85 C amb V HIGH-level input voltage IH V LOW-level input voltage IL V ...

Page 10

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current LI I quiescent supply current CC 12. Dynamic characteristics Table ...

Page 11

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter t CP clock pulse width HIGH or W LOW MR master reset pulse width ...

Page 12

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter f maximum clock frequency max C power dissipation capacitance ...

Page 13

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter t removal time see rem t set-up time ...

Page 14

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter +125 C amb t /t propagation delay CP to ...

Page 15

Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter t set-up time set-up time set-up time ...

Page 16

Philips Semiconductors 13. Waveforms 1/f max CP input PHL TC output THL Fig 7. Waveforms showing the clock input (CP propagation delays, the ...

Page 17

Philips Semiconductors stable M input input input M The shaded areas indicate when the input is permitted to change for predictable output performance 0.5 V ...

Page 18

Philips Semiconductors 14. Application information Fig 14. Programmable timer Fig 15. Divide-by-N counter 9397 750 13812 Product data sheet 8-bit synchronous binary down counter 40103 GND ...

Page 19

Philips Semiconductors 15. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

Page 20

Philips Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 ...

Page 21

Philips Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1.80 mm ...

Page 22

Philips Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

Page 23

Philips Semiconductors 16. Revision history Table 10: Revision history Document ID Release date 74HC40103_3 20041112 Product data sheet • Modifications: • • 74HC_HCT40103_CNV_2 19970918 Product specification - 74HC_HCT40103_1 19901201 Product specification - 9397 750 13812 Product data sheet Data sheet ...

Page 24

Philips Semiconductors 17. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 25

Philips Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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