AD6190 Analog Devices, AD6190 Datasheet - Page 7

• Manufacturer Part Number: AD6190
• Description: 900 MHz RF Transceiver
• Manufacturer: Analog Devices

Transmit Signal Path
The AD6190 transmit chain is designed to accept an input
signal generated by the Z87L00 device. The Z87L00 provides
a digitally-generated FSK signal at 2.508 MHz, sampled at
8.192 MSPS. This sampling process produces a signal with com-
ponents at 2.508 MHz, 5.684 MHz, 10.7 MHz, 16.386 MHz,
and other higher-order image products at frequencies of (N
8.192 MHz
10.7 MHz image, which is used as the transmit IF signal for the
AD6190.
An image-reject transmit up-converts the 10.7 MHz IF signal to
the 902 MHz–928 MHz RF band, with image and spurious
outputs typically 45 dB below the desired signal, and LO leak-
age typically –33 dBc.
The on-chip driver can provide at least 1 mW (0 dBm) into a
50
(PA) with a gain of 15 dB or more, we recommend a nominal
driver output power no higher than –3 dBm (137 mV p-p TX IF
input level) to avoid spurious PA output products in excess of
FCC allowances. The RFOUT pin is normally connected through
an 8.2 nH dc feed inductor, and ac-coupled to the power amplifier.
Frequency Control
The AD6190 includes an on-chip voltage controlled oscillator
for LO generation. An external varactor-tuned tank circuit con-
trols the frequency. This VCO operates at twice the required
LO frequency for several reasons.
First, it is a simple matter to generate the I and Q LO compo-
nents needed for the image-reject mixers by starting with a LO
at twice the desired frequency. The divide-by-two process can
easily provide coarse quadrature signals. Any remaining phase
error is further reduced by an on-chip connection network.
Second, by keeping the oscillator operating at a frequency far
removed from the RF carrier frequency, parasitic feedback from
either the transmit signal or strong received signals is minimized.
This reduces VCO “pulling” effects.
A typical series resonant VCO tank circuit is shown in Figure
11. The oscillator actually operates at twice the required LO
frequency band. The tank inductors (L1, L2) may be imple-
mented as printed traces on the PC board or as lumped circuit chip
components. The printed lines are implemented in nonmicrostrip
to produce higher Q. At least two foil layers should be removed
immediately under the tank area. A suitable tank structure can
be formed from two parallel lines, each approximately 7 mm
long by 0.3 mm wide, continuing out from the device pads. In
REV. 0
load. However, when driving an external Power Amplifier
AD6190
TXOUT
Figure 10. TXOUT Matching Circuit
2.508) MHz. This signal is filtered to select the
8.2nH
+3.3V
2.2pF
TO 50
LOAD
–7–
other words, the Pin 5 and Pin 7 pads are simply extended to
form L1 and L2. Equivalent Hi-Q chip inductors in the 2.2 nH
to 4.7 nH range may be substituted.
The single tuning varactor, D1, (e.g., Alpha Industries SMV-
1233-011) and a fixed capacitor C1 (or a common anode dual
diode) are located on the ends of the lines. Note that this is a
positive supply (VREG) referenced “pump-down” tank, mean-
ing that as the TUNE voltage is increased toward VREG, the
frequency goes down. The loop filter return should also be
referenced to VREG (not ground) in order to minimize com-
mon-mode noise pickup and frequency pushing. The designer is
cautioned to develop a tank with only as much kVCO as re-
quired to allow easy coverage of the band with respect to com-
ponent tolerance and production issues, in order to minimize
phase noise and frequency pulling.
An on-chip dual-modulus (64/65) prescaler allows the frequency
control to be done with a low-cost low-frequency PLL synthe-
sizer chip, such as the Fujitsu MB87006A, Siemens PMB2307,
or similar.
The prescaler output should be connected to ground through a
2.2 k pull-down resistor. The output signal (typically 1 V p-p)
is sufficient to drive most low cost PLLs, and is usually ac-
coupled through a 1 nF capacitor to the PLL input.
Layout, Grounding and Decoupling
The AD6190 is a complex device with high bandwidth and high
gain on-chip. Proper layout, grounding and decoupling, tech-
niques are essential to realizing the full performance of the sys-
tem. Each of the power supply pins should be decoupled to
ground at the chip using a 82 pF chip capacitor in parallel with
a 10 nF chip capacitor. The VCCIF pin requires a 10
resistor in addition to the 82 pF shunt capacitor.
Voltage Regulator
The AD6190 includes an on-chip voltage regulator to stabilize
the supply voltage for the local oscillator, isolating it from any
variations or noise on the main power supply voltage in the
system. This regulator is nominally set for 2.75 V output. An
external PNP pass transistor provides the needed output current
for the VCO.
This regulator is intended to stabilize the voltage for the LO
only, and should not be used for other circuitry. VBATT may
be connected to a 3.3 V dc preregulator or to the precondi-
tioned three-cell battery system.
VTUNE (FROM
LOOP FILTER)
LOOP FILTER
RETURN
Figure 11. Typical VCO Tank Circuit
100nF
(FROM REGULATOR
PASS TRANSISTOR)
39
15nH
39
15nH
15nH
D1
C1
82pF
L2
L1
AD6190
AD6190
TANK–
TANK+
VCLO
GND
series