ISL12024 Intersil Corporation, ISL12024 Datasheet - Page 5

• Manufacturer Part Number: ISL12024
• Description: Real-Time Clock/Calendar
• Manufacturer: Intersil Corporation

AC Electrical Specifications
NOTES:
Timing Diagrams
Bus Timing
Write Cycle Timing
10. t
3. IRQ/F
4. V
5. V
6. Bit BSW = 0 (Standard Mode), V
7. Specified at +25°C.
8. In order to ensure proper timekeeping, the V
9. Parameter is not 100% tested.
SYMBOL
Cpin
sequence of a serial interface Write operation) to the end of the self-timed internal non-volatile write cycle.
t
t
WC
(OUTPUT TIMING)
Cb
WC
DH
IL
DD
(INPUT TIMING)
= V
is the minimum cycle time to be allowed for any non-volatile Write by the user (it is the time from valid STOP condition at the end of Write
> V
SCL
SDA
OUT
DD
BAT
Output Data Hold Time
Capacitive Loading of SDA or SCL
SDA, and SCL Pin Capacitance
Non-volatile Write Cycle Time
x 0.1, V
Inactive.
SDA
SCL
+V
SDA
BATHYS
t
SU:STA
IH
8TH BIT OF LAST BYTE
= V
PARAMETER
DD
x 0.9, f
5
t
BAT
HD:STA
SCL
≥1.8V
(Continued)
t
= 400kHz
F
t
SU:DAT
DD SR-
From SCL falling edge crossing 30%
of V
70% of V
Total on-chip and off-chip.
specification must be followed.
DD
ACK
t
, until SDA enters the 30% to
HIGH
TEST CONDITIONS
DD
ISL12024
window.
t
LOW
t
HD:DAT
CONDITION
STOP
t
R
t
t
AA
WC
MIN
10
0
t
DH
CONDITION
START
TYP
12
t
BUF
MAX
400
10
20
t
SU:STO
t
HD:STO
October 18, 2006
UNITS
ms
pF
pF
ns
FN6370.1