SDA5642-6X Siemens, SDA5642-6X Datasheet
![no-image](/images/no-image-200.jpg)
SDA5642-6X
Available stocks
Related parts for SDA5642-6X
SDA5642-6X Summary of contents
Page 1
ICs for Consumer Electronics VPS-Decoder SDA 5642-6/X Data Sheet 02.97 ...
Page 2
... Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components 1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems 2 with the express written approval of the Semiconductor Group of Siemens AG critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system affect its safety or effectiveness of that device or system ...
Page 3
... Definition of Voltage Levels for VPS Data Line . . . . . . . . . . . . . . . . . . . . . . 23 5.6 Data Format of Programme Delivery Data in the Dedicated TV Line (VPS Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 2 Purchase of Siemens I C components conveys the license under the Philips the I C system provided the system conforms to the I Semiconductor Group 2 C Bus and Bit Allocation ...
Page 4
VPS-Decoder 1 General Description The SDA 5642-6 VPS decoder chip receives all VPS data. 1.1 Features • On chip data slicer • Low external component count 2 • I C-Bus interface communication with external microcontroller • supply voltage ...
Page 5
Pin Configurations P-DIP-14-1 Figure 1 Semiconductor Group P-DSO-20-1 5 SDA 5642-6/X 02.97 ...
Page 6
Pin Description Pin No. Symbol Function P-DIP-14-1 P-DSO-20 13 SCL 3 5 SDA 4 6 CS0 5 7 VCS 6 9 DAVN 7 10 EHB 8 11 ...
Page 7
Block Diagram Figure 2 Semiconductor Group 7 SDA 5642-6/X 02.97 ...
Page 8
System Description 2.1 Functions Referring to the functional block diagram of the VPS decoder, the composite video signal with negative going sync pulses is coupled to the pin CVBS through a capacitor which is used for clamping the bottom ...
Page 9
C Bus I 2.2.1 General Information 2 The I C-Bus interface implemented on the VPS decoder is a slave transmitter/receiver, i.e., both reading from and writing to the VPS decoder is possible. The clock line SCL is controlled ...
Page 10
Write Mode For writing to the VPS decoder, the following format has to be used: Start Chipaddress and Write Mode AS Description of Data Transfer (Write Mode) Step1: In order to start a data transfer the master generates a ...
Page 11
Read Mode For reading from the VPS decoder, the following format has to be used Start Chipaddress Read Mode AS : The contents registers (bytes) can be read starting with byte 1 bit 7 (refer ...
Page 12
Order of Data Output on the Bus I Byte 1 bit Byte 2 bit Byte 3 bit 7 6 ...
Page 13
Order of Data Output on the Bus I Byte 5 bit Byte 6 bit Byte 7 bit ...
Page 14
Description of DAVN and EHB Outputs DAVN (Data Valid active low) EHB (First Field active high) Signal Output DAVN H/L-transition (set low) L/H-transition (set high) always set high EHB L/H-transition H/L-transition In test mode (i. high), both ...
Page 15
Electrical Characteristics Absolute Maximum Ratings Parameter Ambient temperature Storage temperature Total power dissipation Power dissipation per output Input voltage Supply voltage Thermal resistance Note: Maximum ratings are absolute ratings; exceeding any one of these ...
Page 16
Electrical Characteristics Parameter Symbol Input Signals SDA, SCL, CS0 V H-input voltage IH V L-input voltage IL C Input capacitance I I Input current IM Input Signal TI V H-input voltage IH V L-input voltage ...
Page 17
Electrical Characteristics (cont’ Parameter Symbol Output Signals DAVN, EHB, VCS V H-output voltage QH V L-output voltage QL Output Signals SDA (Open-Drain-Stage) V L-output voltage QL Permissible output voltage PLL-Loop Filter Components (see application circuit) ...
Page 18
Figure C-Bus Timing Parameter Clock frequency Inactive time prior to new transmission start-up Hold time during start condition Low-period of clock High-period of clock Set-up time for data Rise time for SDA and SCL signal Fall time ...
Page 19
VPS-Receiver Figure 4 Semiconductor Group 19 SDA 5642-6/X 02.97 ...
Page 20
Appendix 5.1 Control Register Write (I Figure 5 Semiconductor Group 2 C-Bus Write) 20 SDA 5642-6/X 02.97 ...
Page 21
Data Register Read (I Figure 6 Semiconductor Group 2 C-Bus Read) 21 SDA 5642-6/X 02.97 ...
Page 22
DAVN and EHB Timing Figure 7 Semiconductor Group 22 SDA 5642-6/X 02.97 ...
Page 23
Position of VPS Data Lines within the Vertical Blanking Interval Figure 8 1) (shown for first field) 5.5 Definition of Voltage Levels for VPS Data Line Figure 9 Semiconductor Group 23 SDA 5642-6/X 02.97 ...
Page 24
Data Format of Programme Delivery Data in the Dedicated TV Line (VPS) Figure 10 Semiconductor Group 24 SDA 5642-6/X 02.97 ...
Page 25
Figure 11 Semiconductor Group 25 SDA 5642-6/X 02.97 ...
Page 26
Package Outlines P-DIP-14-1 (Plastic Dual In-line Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Semiconductor Group 26 SDA 5642-6/X Dimensions in mm 02.97 ...
Page 27
P-DSO-20-1 (Plastic Dual Small Outline Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 27 SDA 5642-6/X Dimensions in mm 02.97 ...