AD1870 Analog Devices, AD1870 Datasheet

AD1870

Manufacturer Part Number

AD1870

Description

Single-Supply 16-Bit Stereo ADC

Manufacturer

Analog Devices

Datasheet

1.AD1870.pdf (20 pages)

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PRODUCT OVERVIEW

The AD1870 is a stereo, 16-bit oversampling ADC based on

sigma-delta (∑-∆) technology intended primarily for digital

audio bandwidth applications requiring a single 5 V power supply.

Each single-ended channel consists of a fourth-order one-bit

noise shaping modulator and a digital decimation filter. An on-

chip voltage reference, stable over temperature and time, defines

the full-scale range for both channels. Digital output data from

both channels are time-multiplexed to a single, flexible serial

interface. The AD1870 accepts a 256 × f

clock (f

port “master” and “slave” modes. In slave mode, all clocks must

be externally derived from a common source.

Input signals are sampled at 64 × f

switched-capacitors, eliminating external sample-and-hold ampli-

fiers and minimizing the requirements for antialias filtering at the

input. With simplified antialiasing, linear phase can be preserved

across the passband. The on-chip single-ended to differential signal

converters save the board designer from having to provide them

externally. The AD1870’s internal differential architecture provides

increased dynamic range and excellent power supply rejection

characteristics. The AD1870’s proprietary fourth-order differen-

tial switched-capacitor ∑-∆ modulator architecture shapes the

Protected by U.S. Patent Numbers 5055843, 5126653; others pending.

is the sampling frequency) and operates in both serial

onto internally buffered

or a 384 × f

input

one-bit comparator’s quantization noise out of the audio pass-

band. The high order of the modulator randomizes the modulator

output, reducing idle tones in the AD1870 to very low levels.

Because its modulator is single-bit, the AD1870 is inherently

monotonic and has no mechanism for producing differential

linearity errors.

The input section of the AD1870 uses autocalibration to correct

any dc offset voltage present in the circuit, provided that the inputs

are ac-coupled. The single-ended dc input voltage can swing

between 0.7 V and 3.8 V typically. The AD1870 antialias input

circuit requires four external 470 pF NPO ceramic chip filter

capacitors, two for each channel. No active electronics are needed.

Decoupling capacitors for the supply and reference pins are

also required.

The dual digital decimation filters are triple-stage, finite impulse

response filters for effectively removing the modulator’s high

frequency quantization noise and reducing the 64 × f

output data rate to an f

and a narrow transition band that properly digitizes 20 kHz signals

at a 44.1 kHz sampling frequency. Passband ripple is less than

0.006 dB, and stop band attenuation exceeds 90 dB.

RDEDGE

384/256

DGND1

AGNDL

CAPL1

CAPL2

WCLK

LRCK

BCLK

REF

S/M

FUNCTIONAL BLOCK DIAGRAM

THREE-STAGE FIR

DIFFERENTIAL INPUT

DAC

16-Bit - Stereo ADC

DECIMATION

CONVERTER

SINGLE-TO-

FILTER

SERIAL OUTPUT

word rate. They provide linear phase

INTERFACE

DAC

REFERENCE

VOLTAGE

DIFFERENTIAL INPUT

DAC

THREE-STAGE FIR

CONVERTER

Single-Supply

SINGLE-TO-

DECIMATION

FILTER

AD1870

DIVIDER

CLOCK

DAC

(Continued on Page 7)

single-bit

DGND2

CLKIN

TAG

SOUT

RESET

MSBDLY

RLJUST

AGND

CAPR1

CAPR2

AGNDR

REF

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