MPC9608 Motorola Inc, MPC9608 Datasheet
MPC9608
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MPC9608 Summary of contents
Page 1
... The MPC9608 is fully 3.3 V compatible and requires no external components for the internal PLL. All inputs accept LVCMOS sig- nals while the outputs provide LVCMOS compatible levels with the capability to drive terminated 50 dent edge. For series terminated transmission lines, each of the MPC9608 outputs can drive one or two traces giving the devices an effective fanout of 1:20. The device is packaged in a 7x7 mm REV 2 © ...
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... Figure 1. MPC9608 Logic Diagram MPC9608 Figure 2. MPC9608 32-Lead Package Pinout (Top View) For More Information On This Product, Go to: www.freescale.com Bank A Bank B 2 PLL feedback 17 16 VCC 15 QB4 14 QB3 13 QB2 12 GND 11 QB1 10 QB0 9 VCC ...
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... LVCMOS PLL feedback signal output. Connect to FB_IN Ground Negative power supply VCC PLL positive power supply (analog power supply). The MPC9608 requires an external RC filter for the analog power supply pin V VCC Positive power supply for I/O and core 0 PLL frequency range. Refer to Table 3 “Clock frequency configuration for QFB connected to FB_IN” ...
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... Output Impedance OUT I b Input Current IN I Maximum PLL Supply Current CCA I Maximum Quiescent Supply Current CCQ a. The MPC9608 is capable of driving 50 line to a termination voltage Inputs have pull-down resistors affecting the input current. 4 Freescale Semiconductor, Inc. Min 200 2000 200 a Min -0.3 -0 ...
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... PLL mode requires PLL_EN = 0 to enable the PLL and zero-delay operation bypass mode, the MPC9608 divides the input reference clock. d. Applies for bank A and for bank B if BSEL = 0. If BSEL = 1, the minimum and maximum output frequency of bank B is divided by two. ...
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... CMOS fanout buffers. The external feedback option of the MPC9608 clock driver allows for its use as a zero delay buffer. By using the QFB output as a feedback to the PLL the pin for the MPC9608. Figure 3 propagation delay through the device is virtually eliminated ...
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... Figure 5 “Single versus Dual Transmission Lines” illustrates an output driving a single series terminated line versus two series terminated lines in parallel. When taken to its extreme, the fanout of the MPC9608 clock driver is effectively doubled due to its capability to drive multiple lines. ...
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... Pulse Generator Freescale Semiconductor, Inc. OutB = 3.9386 MPC9608 DUT Figure 8. CCLK MPC9608 AC test reference for V For More Information On This Product, Go to: www.freescale.com MPC9608 OUTPUT BUFFER ...
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... CCLK FB_IN JIT( ) for a controlled edge with respect Figure 12. I/O Jitter T JIT(PER Figure 14. Period Jitter CCLK CLK_STOP Figure 16. Setup and Hold Time ( MPC9608 GND GND - T mean mean 1 ...
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... MPC9608 PIN 1 INDEX E1 www.DataSheet4U.com 0. 28X SEATING PLANE (S) A1 DETAIL AD 10 Freescale Semiconductor, Inc. OUTLINE DIMENSIONS 4X 0. DETAIL 32X 0.1 C DETAIL AD BASE PLATING METAL 1˚) 0. SECTION F ...
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... Freescale Semiconductor, Inc. NOTES NOTES For More Information On This Product, Go to: www.freescale.com MPC9608 TIMING SOLUTIONS ...
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... JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573, Japan ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong For More Information On This Product, Go to: www.freescale.com 81-3-3440-3569 852-26668334 HOME PAGE: http://motorola.com/semiconductors MPC9608 ...