MPC564 Motorola, MPC564 Datasheet - Page 2

• Manufacturer Part Number: MPC564
• Description: (MPC562 / MPC563 / MPC564) RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options
• Manufacturer: Motorola

MPC561/MPC563
• Clock synthesizer
• Power management
• Reset controller
• External bus interface that tolerates 5-V inputs, provides 2.6-V outputs and supports multiple-mas-
• Enhanced interrupt controller that supports up to eight external and 40 internal interrupts, simpli-
• USIU supports dual mapping to map part of one internal/external memory to another external
• USIU supports dual mapping of flash on MPC563 and MPC564 to move part of internal flash mem-
• External bus, supporting non-wraparound burst for instruction fetches, with up to 8 instructions per
Burst Buffer Controller (BBC) Module
• Support for enhanced interrupt controller (EIC)
• Support for enhanced exception table relocation feature
• Branch target buffer
• Contains 2-Kbytes of decompression RAM (DECRAM) for code compression. This RAM may also
Flexible Memory Protection Unit
• Flexible memory protection units (MPU) in BBC and L2U
• Default attributes available in one global entry
• Attribute support for speculative accesses
• Up to eight memory regions are supported, four for data and four for instructions
Memory Controller
• Four flexible chip selects via memory controller
• 24-bit address and 32-bit data buses
• 4-Kbyte to one 16-Mbyte (data) or four-Gbyte (instruction) region size support
• Supports enhanced external burst
• Up to eight-beat transfer bursts, two-clock minimum bus transactions
• Use with SRAM, EPROM, flash and other peripherals
• Byte selects or write enables
• 32-bit address decodes with bit masks
• Four regions
512-Kbytes of CDR3 Flash EEPROM Memory (UC3F) – MPC563 Only
• One 512-Kbyte module
• Page read mode
• Block (64 Kbytes) erasable
• External 4.75- to 5.25-V VFLASH power supply for program, erase, and read operations
32-Kbyte static RAM (CALRAM)
• Composed of one 32-Kbyte CALRAM module
• Eight 512-byte overlay regions
• One clock fast accesses
• Two-clock cycle access option for power saving
• Keep-alive power (VDDSRAM) for data retention
ter designs
fies the interrupt structure and decreases interrupt processing time
memory
ory to external bus for development
memory cycle
be used as general-purpose RAM when code compression feature not used.
— Decrementer
— Time base
— 28-Kbyte static RAM
— 4-Kbyte calibration (overlay) RAM feature that allows calibration of flash-based constants
PRODUCT BRIEF
MOTOROLA
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