MAX5035 Maxim, MAX5035 Datasheet - Page 11

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MAX5035

Manufacturer Part Number
MAX5035
Description
1A / 76V / High-Efficiency MAXPower Step-Down DC-DC Converter
Manufacturer
Maxim
Datasheet

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Ensure that the ripple specification of the input capaci-
tor exceeds the worst-case capacitor RMS ripple cur-
rent. Use the following equations to calculate the input
capacitor RMS current:
I
input average current, and η is the converter efficiency.
The ESR of aluminum electrolytic capacitors increases
significantly at cold temperatures. Use a 1µF or greater
value ceramic capacitor in parallel with the aluminum
electrolytic input capacitor, especially for input voltages
below 8V.
The worst-case peak-to-peak and RMS capacitor ripple
current, allowable peak-to-peak output ripple voltage,
and the maximum deviation of the output voltage dur-
ing load steps determine the capacitance and the ESR
requirements for the output capacitors.
The output capacitance and its ESR form a zero, which
improves the closed-loop stability of the buck regulator.
Choose the output capacitor so the ESR zero frequency
(f
equation to verify the value of f
to 250mΩ ESR are recommended to ensure the closed-
loop stability, while keeping the output ripple low.
The output ripple is comprised of ∆V
capacitor discharge) and ∆V
of the capacitor). Use low-ESR tantalum or aluminum
electrolytic capacitors at the output. Assuming that the
contribution from the ESR and capacitor discharge
equal 80% and 20% respectively, calculate the output
where
PRMS
Z
) occurs between 20kHz to 40kHz. Use the following
I
I
I
and D
is the input switch RMS current, I
PRMS
PK
AVGIN
=
I
OUT
f
=
I
Z
=
CRMS
=
=
V
V
OUT
V
2
OUT
+
I
PK
IN
______________________________________________________________________________________
V
×
IN
2
2
I
L
=
π
×
×
,
+
I
×
OUT
η
I
DC
I
I
PRMS
DC
C
Output Filter Capacitor
OUT
=
2
1
OESR
+
1A, 76V, High-Efficiency MAXPower
Z
I
2
OUT
×
. Capacitors with 100mΩ
(
I
ESR
PK
(caused by the ESR
I
AVGIN
OQ
×
OUT
2
I
L
I
DC
(caused by the
2
)
AVGin
 ×
D
3
Step-Down DC-DC Converter
is the
capacitance and the ESR required for a specified rip-
ple using the following equations:
The MAX5035 has an internal soft-start time (t
400µs. It is important to keep the output rise time at
startup below t
rise time is directly proportional to the output capacitor.
Use 68µF or lower capacitance at the output to control
the overshoot below 5%.
In a dynamic load application, the allowable deviation
of the output voltage during the fast-transient load dic-
tates the output capacitance value and the ESR. The
output capacitors supply the step load current until the
controller responds with a greater duty cycle. The
response time (t
loop bandwidth of the converter. The resistive drop
across the capacitor ESR and capacitor discharge
cause a voltage droop during a step load. Use a com-
bination of low-ESR tantalum and ceramic capacitors
for better transient load and ripple/noise performance.
Keep the maximum output voltage deviation above the
tolerable limits of the electronics being powered.
Assuming a 50% contribution each from the output
capacitance discharge and the ESR drop, use the fol-
lowing equations to calculate the required ESR and
capacitance value:
where I
response time of the controller. Controller response
time is approximately one-third of the reciprocal of the
closed-loop unity-gain bandwidth, 20kHz typically.
Proper PC board layout is essential. Minimize ground
noise by connecting the anode of the Schottky rectifier,
the input bypass capacitor ground lead, and the output
filter capacitor ground lead to a single point (“star”
STEP
C
C
OUT
PC Board Layout Considerations
OUT
is the load step and t
SS
ESR
ESR
RESPONSE
to avoid output overshoot. The output
=
OUT
OUT
I
2 2 .
STEP
=
×
=
×
V
V
) depends on the closed-
I
t
OQ
V
OESR
V
STEP
RESPONSE
I
OESR
L
OQ
I
L
×
f
SW
RESPONSE
SS
is the
) of
11

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