ADS-118 Datel, Inc., ADS-118 Datasheet - Page 3

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ADS-118

Manufacturer Part Number
ADS-118
Description
5mhz, Low-power ADC: 12-bit
Manufacturer
Datel, Inc.
Datasheet
TECHNICAL NOTES
2. The ADS-118 achieves its specified accuracies without the
1. Obtaining fully specified performance from the ADS-118
DYNAMIC PERFORMANCE (Cont.)
S/H Acquisition Time
Overvoltage Recovery Time
A/D Conversion Rate
DIGITAL OUTPUTS
Logic Levels
Delay, Falling Edge of EOC to
Delay, Falling Edge of ENABLE to
Output Coding
POWER REQUIREMENTS
Power Supply Ranges
Power Supply Currents
Power Dissipation
Power Supply Rejection
Footnotes:
requires careful attention to pc-card layout and power supply
decoupling. The device’s analog and digital ground systems
are connected to each other internally. For optimal perfor-
mance, tie all ground pins (14, 18, and 23) directly to a large
analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
need for external calibration. If required, the device’s small
initial offset and gain errors can be reduced to zero using
®
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Data Valid
Output Data Valid
+5V Supply
–5V Supply
+5V Supply
–5V Supply
All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
Input voltage ranges for ADS-118A is ±1.25V
A 100ns wide start convert pulse is used for all production testing. For
applications requiring less than an 5MHz sampling rate, wider start convert
pulses can be used.
NOTE: The device only requires the rising edge of a start convert pulse to
operate.
( to ±0.001%FSR, 10V step)
®
+4.75
–4.75
+2.4
MIN.
5
+25°C
TYP.
+205
+5.0
–5.0
200
–80
1.3
85
MAX.
+5.25
–5.25
+220
+0.4
±0.1
–90
1.5
90
–4
+4
20
10
3
+4.75
–4.75
+2.4
MIN.
5
3. To enable the three-state outputs, connect ENABLE
4. Applying a start convert pulse while a conversion is in
Effective bits is equal to:
This is the time required before the A/D output data is valid once the analog input
is back within the specified range.
The minimum supply voltages of +4.9V and –4.9V for ±V
operating at +125°C
–55°C operation only. The minimum limits are +4.75V and –4.75V when
the adjustment circuitry shown in Figures 2a and 2b. When
using this circuitry, or any similar offset and gain-calibration
hardware, make adjustments following warmup. To avoid
interaction, always adjust offset before gain.
(pin 17) to a logic "0" (low). To disable, connect pin 17 to
logic "1" (high). The three-state outputs are permanently
enabled in the ADS-118A.
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle.
0 to +70°C
TYP.
+205
+5.0
–5.0
200
–80
1.3
85
Offset Binary
(SNR + Distortion) – 1.76 +
MAX.
+5.25
–5.25
+220
+0.4
±0.1
–90
1.5
90
–4
+4
20
10
+2.4
+4.9
–4.9
MIN.
5
–55 to +125°C
6.02
20 log
ADS-118/118A
TYP.
+205
+5.0
–5.0
200
–80
1.3
85
Actual Input Amplitude
Full Scale Amplitude
DD
are required for
MAX.
+5.25
–5.25
+220
+0.4
±0.1
–90
1.5
–4
+4
20
10
90
%FSR/%V
UNITS
Watts
Volts
Volts
Volts
Volts
MHz
MHz
MHz
mA
mA
mA
mA
ns
ns

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