ADS-112 Datel, Inc., ADS-112 Datasheet - Page 3

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ADS-112

Manufacturer Part Number
ADS-112
Description
1mhz, Low-power ADC: 12-bit
Manufacturer
Datel, Inc.
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
ADS-112MM
Manufacturer:
NS
Quantity:
780
TECHNICAL NOTES
1. Applications which are unaffected by endpoint errors or
2. For best performance, always connect the analog and
3. Bypass the analog and digital supplies and the +10V
4. Obtain straight binary/offset binary output coding by tying
remove them through software will use the typical connec-
tions shown in Figure 3. Remove system errors or adjust
the small initial errors of the ADS-112 to zero using the
optional external circuitry shown in Figure 4. The external
adjustment circuit has no effect on the throughput rate.
digital ground pins to a ground plane beneath the converter.
The analog and digital grounds are not connected to each
other internally.
reference (pin 21) to ground with 4.7µF, 25V tantalum
electrolytic capacitors in parallel with 0.1µF ceramic
capacitors. Bypass the +10V reference (pin 21) to analog
ground (pin 23).
COMP BIN (pin 18) to +5V or leaving it open. The device
®
INTERNAL S/H
CONVERT
OUTPUT
START
DATA
EOC
®
Note: Scale is approximately 50ns per division.
N
DATA N-1 VALID
800ns min.
10ns min.
20ns max.
Conversion Time
20ns max.
150ns, ±25ns
Hold
Figure 2. ADS-112 Timing Diagram
600ns max.
200ns max.
INVALID
Acquisition Time
DATA
3
5. To enable the three-state outputs, connect ENABLE (pin 17)
6. Do not change the status of pin 18 when EOC is high.
7. Re-initiating the START CONVERT (pin 16) while EOC is a
TIMING
250ns
has an internal pull-up resistor on this pin. To obtain
complementary binary or complementary offset binary
output coding, tie pin 18 to ground. The pin 18 signal is
compatible with CMOS/TTL logic levels for those users
desiring dynamic control of this function.
to a logic "0" (low). To disable, connect pin 17 to a logic "1"
(high).
logic "1" (high) will result in a new conversion sequence.
Figure 2 shows the relationship between the various input
signals. The timing shown applies over the operating
temperature range and over the operating power supply
range. These times are guaranteed by design.
60ns max.
35ns max.
N+1
DATA N VALID
INVALID
DATA
ADS-112

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