OPA689 Burr-Brown, OPA689 Datasheet - Page 13

• Manufacturer Part Number: OPA689
• Description: Wideband / High Gain VOLTAGE LIMITING AMPLIFIER
• Manufacturer: Burr-Brown

OPERATING INFORMATION
THEORY OF OPERATION
The OPA689 is a voltage feedback op amp that is stable for
gains +4. The output voltage is limited to a range set by the
limiter pins (5 and 8). When the input tries to overdrive the
output, the limiters take control of the output buffer. This
avoids saturating any parts in the signal path, gives quick
overdrive recovery, and gives consistent limiter accuracy for
any gain.
This part is de-compensated (stable for gains
gives greater bandwidth, higher slew rate, and lower noise
than the unity gain stable companion part OPA688.
The limiters have a very sharp transition from the linear
region of operation to output limiting. This allows the limiter
voltages to be set very near (<100 mV) the desired signal
range. The distortion performance is also very good near the
limiter voltages.
CIRCUIT LAYOUT
Achieving optimum performance with the high frequency
OPA689 requires careful attention to layout design and
component selection. Recommended PCB layout techniques
and component selection criteria are:
a) Minimize parasitic capacitance to any ac ground for all
of the signal I/O pins. Open a window in the ground and
power planes around the signal I/O pins, and leave the
ground and power planes unbroken elsewhere.
b) Provide a high quality power supply. Use linear regu-
lators, ground plane, and power planes, to provide power.
Place high frequency 0.1 F decoupling capacitors < 0.2"
away from each power supply pin. Use wide, short traces to
connect to these capacitors to the ground and power planes.
Also use larger (2.2 F to 6.8 F) high frequency decoupling
capacitors to bypass lower frequencies. They may be some-
what further from the device, and be shared among several
adjacent devices.
c) Place external components close to the OPA689. This
minimizes inductance, ground loops, transmission line ef-
fects and propagation delay problems. Be extra careful with
the feedback (R
d) Use high frequency components to minimize parasitic
elements. Resistors should be a very low reactance type.
Surface mount resistors work best and allow a tighter layout.
Metal film or carbon composition axially-leaded resistors
can also provide good performance when their leads are as
short as possible. Never use wire-wound resistors for high
frequency applications. Remember that most potentiometers
have large parasitic capacitances and inductances.
Multilayer ceramic chip capacitors work best and take up
little space. Monolithic ceramic capacitors also work very
well. Use RF type capacitors with low ESR and ESL. The
large power pin bypass capacitors (2.2 F to 6.8 F) should
be tantalum for better high frequency and pulse perfor-
mance.
F
), input and output resistors.
+4). This
13
e) Choose low resistor values to minimize the time constant
set by the resistor and its parasitic parallel capacitance. Good
metal film or surface mount resistors have approximately
0.2pF parasitic parallel capacitance. For resistors > 1.5k ,
this adds a pole and/or zero below 500MHz.
Make sure that the output loading is not too heavy. The
recommended 750
point in your design.
f) Use short direct traces to other wideband devices on
the board. Short traces act as a lumped capacitive load. Wide
traces (50 to 100 mils) should be used. Estimate the total
capacitive load at the output, and use the series isolation
resistor recommended in the R
Parasitic loads < 2pF may not need the isolation resistor.
g) When long traces are necessary, use transmission line
design techniques (consult an ECL design handbook for
microstrip and stripline layout techniques). A 50 transmis-
sion line is not required on board—a higher characteristic
impedance will help reduce output loading. Use a matching
series resistor at the output of the op amp to drive a
transmission line, and a matched load resistor at the other
end to make the line appear as a resistor. If the 6dB of
attenuation that the matched load produces is not acceptable,
and the line is not too long, use the series resistor at the
source only. This will isolate the op amp output from the
reactive load presented by the line, but the frequency re-
sponse will be degraded.
Multiple destination devices are best handled as separate
transmission lines, each with its own series source and shunt
load terminations. Any parasitic impedances acting on the
terminating resistors will alter the transmission line match,
and can cause unwanted signal reflections and reactive
loading.
h) Do not use sockets for high speed parts like the OPA689.
The additional lead length and pin-to-pin capacitance intro-
duced by the socket creates an extremely troublesome para-
sitic network. Best results are obtained by soldering the part
onto the board. If socketing for DIP prototypes is desired,
high frequency flush mount pins (e.g., McKenzie Technol-
ogy #710C) can give good results.
POWER SUPPLIES
The OPA689 is nominally specified for operation using
either 5V supplies or a single +5V supply. The maximum
specified total supply voltage of 13V allows reasonable
tolerances on the supplies. Higher supply voltages can break
down internal junctions, possibly leading to catastrophic
failure. Single supply operation is possible as long as com-
mon mode voltage constraints are observed. The common
mode input and output voltage specifications can be inter-
preted as a required headroom to the supply voltage. Observ-
ing this input and output headroom requirement will allow
design of non-standard or single supply operation circuits.
Figure 2 shows one approach to single-supply operation.
feedback resistor is a good starting
S
OPA689
vs Capacitive Load plot.
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