ADP3168 Analog Devices, ADP3168 Datasheet - Page 21

• Manufacturer Part Number: ADP3168
• Description: 4-Phase Synchronous Buck Controller
• Manufacturer: Analog Devices

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4
C
DI/DT REDUCTION
In continuous inductor current mode, the source current of the
high-side MOSFET is approximately a square wave with a duty
ratio equal to n × V
maximum output current. To prevent large voltage transients, a
low ESR input capacitor sized for the maximum rms current
must be used. The maximum rms capacitor current is given by
Note that the capacitor manufacturer’s ripple current ratings are
often based on only 2,000 hours of life. This makes it advisable
to further derate the capacitor or choose a capacitor rated at a
higher temperature than required. Several capacitors may be
placed in parallel to meet size or height requirements in the
design. In this example, the input capacitor bank is formed by
three 2,200 µF, 16 V Nichicon capacitors with a ripple current
rating of 3.5 A each.
To reduce the input current di/dt to a level below the
recommended maximum of 0.1 A/µs, an additional small
inductor (L > 1 µH @ 15 A) should be inserted between the
converter and the supply bus. That inductor also acts as a filter
between the converter and the primary power source.
IN
SELECTION AND INPUT CURRENT
I
I
R
CRMS
CRMS
CS
2
(
NEW
=
=
. 0
D
)
125
×
=
I
R
O
SC
×
×
65
2
OUT
(
OLD
A
/V
N
×
)
1
×
×
IN
D
V
3
V
and an amplitude of one-nth of the
R
×
NL
NL
CS
−
. 0
1
1
2
−
−
(
125
NEW
V
V
FLCOLD
FLHOT
−
)
=
1
=
R
10
CS
1
5 .
Figure 14. Efficiency of the Circuit of Figure 11 vs. Output Current
(
100
OLD
90
80
70
60
50
40
30
20
10
A
0
0
)
×
R
TH
(
10
25
°
C
)
(34)
(35)
+
(
R
R
20
Rev. B | Page 21 of 24
OUTPUT CURRENT (A)
CS
CS
1
1
(
OLD
(
OLD
)
)
−
30
+
R
R
CS
TH
2
TUNING PROCEDURE FOR THE ADP3168
1.
2.
DC Loadline Setting
3.
4.
5.
6.
7.
8.
9.
10. Measure output ripple at no-load and full-load with scope
(
1
NEW
(
25
40
°
C
)
)
)
Build circuit based on compensation values computed
from design spreadsheet.
Hook up dc load to circuit, turn on, and verify operation.
Also check for jitter at no-load and full-load.
Measure output voltage at no-load (V
within tolerance.
Measure output voltage at full-load cold (V
board set for ~10 minutes at full-load and measure output
(V
millivolts, adjust R
Repeat Step 4 until cold and hot voltage measurements
remain the same.
Measure output voltage from no-load to full-load using 5 A
steps. Compute the loadline slope for each change and then
average to get overall loadline slope (R
If R
following to adjust the R
Repeat Steps 6 and 7 to check loadline and repeat
adjustments if necessary.
Once complete with dc loadline adjustment, do not change
R
and make sure it is within specifications.
R
×
PH
PH
(
FLHOT
R
, R
OMEAS
(
50
NEW
CS
CS1
1
(
). If there is a change of more than a couple of
OLD
)
, R
is off from R
=
)
CS2
R
−
60
PH
R
, or R
TH
(
OLD
(
25
°
CS1
)
TH
C
×
)
)
O
and R
R
for rest of procedure.
−
OMEAS
by more than 0.05 mΩ, use the
R
R
PH
O
TH
values:
1
(
CS2
25
°
C
using Equations 35 and 37.
)
(37)
NL
OMEAS
). Verify that it is
FLCOLD
).
ADP3168
). Let
(36)