ADP3110 Analog Devices, ADP3110 Datasheet - Page 8

• Manufacturer Part Number: ADP3110
• Description: 12V MOSFET Driver
• Manufacturer: Analog Devices

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ADP3110
APPLICATION INFORMATION
SUPPLY CAPACITOR SELECTION
For the supply input (VCC) of the ADP3110, a local bypass
capacitor is recommended to reduce the noise and to supply
some of the peak currents drawn. Use a 4.7 μF, low ESR
capacitor. Multilayer ceramic chip (MLCC) capacitors provide
the best combination of low ESR and small size. Keep the
ceramic capacitor as close as possible to the ADP3110.
BOOTSTRAP CIRCUIT
The bootstrap circuit uses a charge storage capacitor (C
a diode, as shown in Figure 1. These components can be
selected after the high-side MOSFET is chosen. The bootstrap
capacitor must have a voltage rating that is able to handle twice
the maximum supply voltage. A minimum 50 V rating is
recommended. The capacitor values are determined using the
following equations:
where:
Q
V
V
Rearranging Equation 1 and Equation 2 to solve for C
C
For example, an NTD60N02 has a total gate charge of about
12 nC at V
C
capacitors should be used.
R
switch node. It also provides peak current limiting through D1.
An R
needs to be able to handle at least 250 mW due to the peak
currents that flow through it.
BST
GATE
D
BST2
BST1
GATE
5 V to 10 V, 7 V being typical).
is the voltage drop across D1.
is used for slew rate limiting to minimize the ringing at the
C
C
C
can then be found by rearranging Equation 1
= 12 nF and C
BST
C
is the desired gate drive voltage (usually in the range of
is the total gate charge of the high-side MOSFET at V
BST
BST
BST
BST
value of 1.5 Ω to 2.2 Ω is a good choice. The resistor
C
1
1
2
1
= 10
GATE
=
+
BST
+
10
C
C
1
BST
BST
= 7 V. Using VCC = 12 V and V
×
×
VCC
Q
V
2
2
GATE
GATE
Q
=
BST2
=
GATE
10
VCC
−
= 6.8 nF. Good quality ceramic
×
V
V
−
GATE
D
C
Q
V
−
GATE
BST
GATE
V
1
D
D
= 1 V, we find
BST1
BST1
yields
) and
(1)
(2)
(3)
(4)
GATE
Rev. 0 | Page 8 of 12
.
A small signal diode can be used for the bootstrap diode due to
the ample gate drive voltage supplied by V
diode must have a minimum 15 V rating to withstand the
maximum supply voltage. The average forward current can be
estimated by
where f
controller.
The peak surge current rating should be calculated by
MOSFET SELECTION
When interfacing the ADP3110 to external MOSFETs, the
designer should be aware of a few considerations. These help to
make a more robust design that minimizes stresses on both the
driver and MOSFETs. These stresses include exceeding the
short-time duration voltage ratings on the driver pins as well as
the external MOSFET.
It is also highly recommended to use the Boot-Snap circuit to
improve the interaction of the driver with the characteristics of
the MOSFETs. If a simple bootstrap arrangement is used, make
sure to include a proper snubber network on the SW node.
High-Side (Control) MOSFETs
The high-side MOSFET is usually selected to be high speed to
minimize switching losses (see any ADI Flex-Mode™ controller
data sheet for more details on MOSFET losses). This usually
implies a low gate resistance and low input capacitance/charge
device. Yet, there is also a significant source lead inductance
that can exist (this depends mainly on the MOSFET package; it
is best to contact the MOSFET vendor for this information).
The ADP3110 DRVH output impedance and the external
MOSFETs’ input resistance determine the rate of charge
delivery to the MOSFETs’ gate capacitance which, in turn,
determines the switching times of the MOSFETs. A large
voltage spike can be generated across the source lead inductance
when the high-side MOSFETs switch off, due to large currents
flowing in the MOSFETs during switching (usually larger at
turn off due to ramping of the current in the output inductor).
This voltage spike occurs across the internal die of the
MOSFETs and can lead to catastrophic avalanche. The
mechanisms involved in this avalanche condition can be
referenced in literature from the MOSFET suppliers.
I
I
F
F
(
MAX
(
PEAK
AVG
is the maximum switching frequency of the
)
)
=
=
Q
VCC
GATE
R
BST
−
×
V
f
D
MAX
CC
. The bootstrap
(5)
(6)