USB3300 SMSC Corporation, USB3300 Datasheet - Page 20

• Manufacturer Part Number: USB3300
• Description: Hi-Speed USB Host
• Manufacturer: SMSC Corporation

Revision 1.06 (07-19-06)
STP
POR
The advantage of a “wrapper less” architecture is that the PHY has a lower USB latency than a design
which must first register signals into the PHY’s wrapper before the transfer to the PHY core. A low
latency PHY allows a Link to use a wrapper around a UTMI Link and still make the required USB turn-
around timing given in the USB 2.0 specification.
RxEndDelay maximum allowed by the UTMI+/ULPI for 8-bit data is 63 high speed clocks. USB3300
uses a low latency high speed receiver path to lower the RxEndDelay to 43 high speed clocks. This
low latency design gives the Link more cycles to make decisions and reduces the Link complexity. This
is the result of the “wrapper less” architecture of the USB3300. This low RxEndDelay should allow
legacy UTMI Links to use a “wrapper” to convert the UTMI+ interface to a ULPI interface.
In
addresses the PHY. The Link must use the DIR output to determine direction of the ULPI data bus.
The USB3300 is the “bus arbitrator”. The ULPI Protocol Block will route data/commands to the
transmitter or the ULPI register array.
Data[7:0]
Figure
NXT
DIR
6.2, a single ULPI Protocol Block decodes the ULPI 8-bit bi-directional bus when the Link
ULPI Register
ULPI Protocol
Block
Array
Rx Data
Figure 6.2 ULPI Digital Block Diagram
Tx Data
InterruptEnable Rise[4:0]
InterruptEnableFall[4:0]
XcvrSelect[1:0]
TermSelect
OpMode[1:0]
Reset
SuspendM
6pinSerial Mode
3pinSerial Mode
ClockSuspendM
AutoResume
Interface Protect Disable
Indicator Complement
Indicator Pass Thru
IdPullUp
DpPulldown
DmPulldown
DischrgVbus
ChrgVbus
DrvVbus
DrvVbusExternal
UseExternal Vbus Indicator
DATASHEET
InterruptStatus[4:0]
InterruptLatch[4:0]
Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
RXD CMD
20
High Speed Data
Full / Low Speed
High Speed TX
Low Speed TX
Full Speed TX
Data Recovery
Recovery
Transceiver
Interrupt
Control
Control
Module
To USB
Transceiver
To OTG
Module
HS Tx Data
FS/LS Tx Data
HostDisconnect
NOTE:
The USB3300 uses
a wrapperless ULPI
interface.
Linestates[1:0]
HS RX Data
SessionValid
FS/LS Data
SessionEnd
VbusValid
IdGnd
To USB
Transceiver
From OTG
Module
From USB
Transceiver
SMSC USB3300
Datasheet