IDT49C465 Integrated Device Technology, Inc., IDT49C465 Datasheet - Page 15

• Manufacturer Part Number: IDT49C465
• Description: Error Detection And Correction
• Manufacturer: Integrated Device Technology, Inc.

IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
DEFINITIONS OF TERMS:
PCBI
FUNCTIONAL EQUATIONS:
IDT49C465 to determine the values of the partial checkbits,
checkbits, partial syndromes and final internal syndromes.
NOTE: All “ ” symbols below represent the “EXCLUSIVE-
OR” function.
PA = D
PB = D
PC = D
PD = D
PE = D
PF = D
PG = D
PH
PH
PH
CBI
The equations below describe the terms used in the
0
1
2
FS
= D
= D
= D
0
D
D
0
– PCBI
0
0
0
0
0
2
0
20
8
8
– CBI
D
D
D
D
D
D
D
D
D
0
1
0
– FS
– D
18
20
21
20
25
26
17
19
19
D
D
D
D
D
D
D
D
D
D
D
3
1
31
1
3
1
9
9
7
7
4
2
4
22
7
D
D
D
D
D
D
D
D
D
D
D
D
20
23
22
D
21
26
27
18
21
21
= System Data and/or Memory Data Inputs
= Checkbit Inputs
= Partial Checkbit Inputs
= Final Internal Syndrome bits
D
D
D
D
D
4
5
D
2
4
2
10
6
3
10
D
6
23
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
7
22
25
6
23
22
27
28
19
26
24
D
4
5
D
D
3
7
5
7
11
11
D
D
D
D
D
26
D
D
D
D
D
D
D
D
D
D
D
D
9
7
6
D
6
8
8
24
26
27
23
28
4
29
20
28
25
D
10
D
D
D
12
12
D
D
D
D
D
10
11
D
28
8
7
9
9
D
D
D
D
D
D
D
D
D
5
D
26
29
28
30
29
30
21
29
27
12
D
D
D
D
D
D
D
D
13
13
D
D
10
14
13
12
11
11
29
6
D
D
D
D
D
D
D
D
D
D
28
31
29
31
30
31
22
31
30
13
D
D
D
D
D
D
D
D
D
14
14
D
12
15
15
13
14
14
7
31
D
D
D
31
23
15
D
D
D
D
D
D
D
D
D
15
24
15
16
18
16
16
17
17
D
16
D
D
D
D
D
D
D
D
D
17
19
17
19
24
25
16
18
18
11.7
CMOS TESTING CONSIDERATIONS
account when applying high-speed CMOS products to the
automatic test environment. Large output currents are being
switched in very short periods and proper testing demands
that test set-ups have minimized inductance and guaranteed
zero voltage grounds. The techniques listed below will assist
the user in obtaining accurate testing results:
1) All input pins should be connected to a voltage potential
2) Placement and value of decoupling capacitors is critical.
3) Device grounding is extremely critical for proper device
4) To guarantee data sheet compliance, the input thresholds
Special test board considerations must be taken into
during testing. If left floating, the device may oscillate,
causing improper device operation and possible latchup.
Each physical set-up has different electrical
characteristics and it is recommended that various
decoupling capacitor sizes be experimented with.
Capacitors should be positioned using the minimum lead
lengths. They should also be distributed to decouple
power supply lines and be placed as close as possible to
the DUT power pins.
testing. The use of multi-layer performance boards with
radial decoupling between power and ground planes is
necessary. The ground plane must be sustained from the
performance board to the DUT interface board and wiring
unused interconnect pins to the ground plane is recom-
mended. Heavy gauge stranded wire should be used for
power wiring, with twisted pairs being recommended for
minimized inductance.
should be tested per input pin in a static environment. To
allow for testing and hardware-induced noise, IDT recom-
mends using V
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IL
0V and V
IH
3V for AC tests.
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