MB15E05 Fujitsu Media Devices, MB15E05 Datasheet - Page 9

• Manufacturer Part Number: MB15E05
• Description: ASSP Single Serial Input PLL Frequency Synthesizer On-Chip 2.0GHz Prescaler
• Manufacturer: Fujitsu Media Devices

Table.4 Binary 7-bit Swallow Counter Data Setting
Table. 5 Prescaler Data Setting
Table. 6 LD/fout Output Select Data Setting
Relation between the FC input and phase characteristics
The FC bit changes the phase characteristics of the phase comparator. Both the internal charge pump output level
(D
output is controlled by the FC bit. The relationship between the FC bit and each of D
Table. 7 FC Bit Data Setting (LDS = ”H”)
* : High impedance
O
Note: Divide ratio (A) range = 0 to 127
) and the phase comparator output ( R, P) are reversed according to the FC bit. Also, the monitor pin (f
f
f
f
LDS
r
r
r
SW
H
H
> f
< f
= f
Divide
L
L
ratio
127
(A)
p
p
p
0
1
fout signal
LD signal
Do
Z*
H
L
A
7
0
0
1
A
6
0
0
1
Prescaler Divide ratio
LD/fout output signal
H
L
L
R
FC = High
A
5
0
0
1
128/129
64/65
A
4
0
0
1
Z*
Z*
L
P
A
3
0
0
1
LD/fout
A
2
0
0
1
(fr)
(fr)
(fr)
A
1
0
1
1
Do
Z*
H
L
H
L
L
R
FC = Low
O
, R, and P is shown below.
Z*
Z*
L
P
MB15E05
LD/fout
(fp)
(fp)
(fp)
OUT
)
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