1207A ON Semiconductor, 1207A Datasheet - Page 10

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1207A

Manufacturer Part Number
1207A
Description
Search -----> NCP1207A
Manufacturer
ON Semiconductor
Datasheet

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COMPARATOR
Demagnetization Detection
activity on the auxiliary winding. This voltage features a
FLYBACK polarity. The typical detection level is fixed at
50 mV as exemplified by Figure 17.
further to the driver going−low transition. This prevents the
switching frequency to exceed (1 / (T
avoid false leakage inductance tripping at turn−off. In some
cases, the leakage inductance kick is so energetic, that a
slight filtering is necessary.
specific component arrangement as detailed by Figure 18. In
this picture, the zener diodes network protect the IC against
any potential ESD discharge that could appear on the pins.
The first ESD diode connected to the pad, exhibits a parasitic
capacitance. When this parasitic capacitance (10 pF
typically) is combined with R
and the possibility to switch right in the drain−source wave
exists. This guarantees QR operation with all the associated
benefits (low EMI, no turn−on losses etc.). R
calculated to limit the maximum current flowing through
pin 1 to less than +3 mA/−2 mA. If during turn−on, the
auxiliary winding delivers 30 V (at the highest line level),
then the minimum R
/ 2 mA = 14.6 kW. This value will be further increased to
introduce a re−start delay and also a slight filtering in case
of high leakage energy.
power.
TO INTERNAL
R
−1.0
The core reset detection is done by monitoring the voltage
An internal timer prevents any re−start within 8.0 ms
The 1207 demagnetization detection pad features a
Figure 19 portrays a typical V
esd
Figure 17. Core reset detection is done through a
7.0
5.0
3.0
1.0
+ R
dedicated auxiliary winding monitoring
int
R
Figure 18. Internal Pad Implementation
RE−STARTS
int
POSSIBLE
= 28 k
dem
2
ESD2
0 V
R
value is defined by: (30 V + 0.7 V)
esd
dem
, a re−start delay is created
DS
1
ESD1
shot at nominal output
ON
1
4
+ 8.0 ms)) but also
5
R
dem
50 mV
dem
should be
http://onsemi.com
4
3
Aux
NCP1207A
10
Overvoltage Protection
voltage 4.5 ms after the turn−off sequence. This delay
guarantees a clean plateau, providing that the leakage
inductance ringing has been fully damped. If this would not
be the case, the designer should install a small RC damper
across the transformer primary inductance connections.
Figure 20 shows where the sampling occurs on the auxiliary
winding.
NCP1207A enters a latchoff phase and stops all switching
operations. The controller stays fully latched in this position
and the DSS is still active, keeping the V
V/12 V as in normal operations. This state lasts until the V
is cycled down 4 V, e.g. when the user unplugs the power
supply from the mains outlet.
reference level and pin1 is routed via a divide by 1.44
network. As a result, when Vpin 1 reaches 7.2 V, the OVP
comparator is triggered. The threshold can thus be adjusted
by either modifying the power winding to auxiliary winding
turn ratios to match this 7.2 V level, or insert a resistor from
Pin 1 to ground to cope with your design requirement.
The overvoltage protection works by sampling the plateau
When an OVP condition has been detected, the
By default, the OVP comparator is biased to a 5 V
400
300
200
100
8.0
6.0
4.0
2.0
Figure 20. A voltage sample is taken 4.5 ms after
0
0
Figure 19. The NCP1207A Operates in
Borderline / Critical Operation
4.5 ms
the turn−off sequence
SAMPLING HERE
CC
between 5.3
CC
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