HMP451S6MMP8C Hynix Semiconductor, HMP451S6MMP8C Datasheet - Page 13

no-image

HMP451S6MMP8C

Manufacturer Part Number
HMP451S6MMP8C
Description
200pin Unbuffered Ddr2 Sdram So-dimms Based On 2gb Version
Manufacturer
Hynix Semiconductor
Datasheet
Rev. 0.1 / May. 2008
Electrical Characteristics & AC Timings
Speed Bins and CL,tRCD,tRP,tRC and tRAS for Corresponding Bin
AC Timing Parameters by Speed Grade
Average clock period
Average clock HIGH pulse width
Average clock LOW pulse width
Write command to DQS associated clock
edge
DQS latching rising transition to
associated clock edges
DQS falling edge to CK setup time
DQS falling edge hold time from CK
DQS input HIGH pulse width
DQS input LOW pulse width
Write preamble
Write postamble
Address and control input setup time
Address and control input hold time
Control & Address input pulse width for
each input
DQ and DM input setup time
DQ and DM input hold time
DQ and DM input pulse width for each
input
Bin(CL-tRCD-tRP)
CAS Latency
Parameter
Speed
tRCD
tRAS
tRP
tRC
Parameter
DDR2-800
5-5-5
(S5)
12.5
12.5
57.5
min
45
5
Symbol
tWPRE
tDQSS
tDQSH
tWPST
tDQSL
DDR2-800
tDIPW
tDSS
tDSH
tlPW
tCK
tCH
tDS
tDH
tCL
WL
tIH
tlS
6-6-6
(S6)
min
15
15
45
60
6
1200pin Unbuffered DDR2 SDRAM SO-DIMMs
-0.25
3000
RL-1
0.48
0.48
0.35
0.35
0.35
0.35
min
200
275
100
175
0.2
0.2
0.4
0.6
DDR2-667
DDR2-667
5-5-5
(Y5)
min
15
15
45
60
5
8000
RL-1
max
0.52
0.52
0.25
0.6
X
X
X
X
X
X
X
X
X
X
X
Unit
tCK
ns
ns
ns
ns
2500
RL-1
-0.25
0.48
0.48
0.35
0.35
0.35
0.35
min
175
250
125
0.2
0.2
0.4
0.6
50
DDR2-800
8000
RL-1
max
0.52
0.52
0.25
0.6
X
X
X
X
X
X
X
X
X
X
X
Unit
nCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ps
ps
ps
ps
ps
20,28,
20,28,
35,36
35,36
35,36
5,7,9,
22,29
5,7,9,
22,29
6,7,8,
6,7,8,
Note
30
30
30
10
31
31
13

Related parts for HMP451S6MMP8C