CY2305C Cypress Semiconductor Corporation., CY2305C Datasheet

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CY2305C

Manufacturer Part Number
CY2305C
Description
3.3v Zero Delay Clock Buffer
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Features
Functional Description
The CY2305C and CY2309C are die replacement parts for
CY2305 and CY2309.
The CY2309C is a low cost 3.3V zero delay buffer designed to
distribute high speed clocks and is available in a 16-pin SOIC or
TSSOP package. The CY2305C is an 8-pin version of the
CY2309C. It accepts one reference input and drives out five low
Cypress Semiconductor Corporation
Document Number: 38-07672 Rev. *G
Logic Block Diagram for CY2305C
10 MHz to 100-133 MHz operating range
Zero input and output propagation delay
Multiple low skew outputs
One input drives five outputs (CY2305C)
One input drives nine outputs, grouped as 4 + 4 + 1 (CY2309C)
50 ps typical cycle-cycle jitter (15 pF, 66 MHz)
Test Mode to bypass phase locked loop (PLL) (CY2309C) only,
see
Available in space saving 16-pin 150 Mil SOIC or 4.4 mm
TSSOP packages (CY2309C), and 8-pin, 150 Mil SOIC
package (CY2305C)
3.3V operation
Commercial, Industrial and Automotive-A flows available
“Select Input Decoding for CY2309C”
REF
on page 3
198 Champion Court
PLL
skew clocks. The -1H versions of each device operate up to
100-133 MHz frequencies and have higher drive than the -1
devices. All parts have on-chip PLLs which lock to an input clock
on the REF pin. The PLL feedback is on-chip and is obtained
from the CLKOUT pad.
The CY2309C has two banks of four outputs each that are
controlled by the select inputs as shown in the
Decoding for CY2309C”
required, BankB is three-stated. The input clock is directly
applied to the outputs by the select inputs for chip and system
testing purposes.
The CY2305C and CY2309C PLLs enter a power down mode
when there are no rising edges on the REF input. In this state,
the outputs are three-stated and the PLL is turned off. This
results in less than 12.0 μA of current draw for commercial
temperature devices and 25.0 μA for industrial and automotive-A
temperature parts. The CY2309C PLL shuts down in one
additional case as shown in the
CY2309C”
In the special case when S2:S1 is 1:0, the PLL is bypassed and
REF is output from DC to the maximum allowable frequency. The
part behaves as a non-zero delay buffer in this mode and the
outputs are not three-stated.
The CY2305C or CY2309C is available in two or three different
configurations as shown in the
The CY2305C-1 or CY2309C-1 is the base part. The CY2305-1H
or CY2309-1H is the high drive version of the -1. Its rise and fall
times are much faster than the -1.
3.3V Zero Delay Clock Buffer
on page
San Jose
CLKOUT
CLK1
CLK2
CLK3
CLK4
3.
,
CA 95134-1709
on page 3. If all output clocks are not
“Ordering Information”
“Select Input Decoding for
Revised October 4, 2007
CY2305C
CY2309C
408-943-2600
“Select Input
on page 9.
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CY2305C Summary of contents

Page 1

... REF is output from DC to the maximum allowable frequency. The part behaves as a non-zero delay buffer in this mode and the outputs are not three-stated. The CY2305C or CY2309C is available in two or three different configurations as shown in the The CY2305C-1 or CY2309C-1 is the base part. The CY2305-1H or CY2309-1H is the high drive version of the -1 ...

Page 2

... CLK3 GND 5 Description Input reference frequency Buffered clock output Buffered clock output Ground Buffered clock output 3.3V supply Buffered clock output Buffered clock output, internal feedback on this pin CY2305C CY2309C CLKOUT CLKA1 CLKA2 CLKA3 CLKA4 CLKB1 CLKB2 CLKB3 CLKB4 Page [+] Feedback ...

Page 3

... Buffered clock output, Bank A Buffered clock output, Bank A Buffered output, internal feedback on this pin [4] CLOCK B1–B4 CLKOUT Three state Driven Three state Driven Driven Driven Driven Driven CY2305C CY2309C Output Source PLL Shutdown PLL N PLL N Reference Y PLL N Page [+] Feedback [+] Feedback ...

Page 4

... Load Capacitance, from 100 MHz to 133 MHz L C Input Capacitance IN t Power up time for all V PU (power ramps are monotonic) Operating Conditions for CY2305CSXI-XX, CY2305CSXA-XX and CY2309CSXI-XX Operating conditions table for CY2305CSXI-XX, CY2305CSXA-XX and CY2309CSXI-XX Industrial / Automotive-A Temperature Devices. Parameter V Supply Voltage DD T Operating Temperature (Ambient Temperature ...

Page 5

... Device to Device Skew 7 [6] t Cycle to Cycle Jitter, peak J [6] t PLL Lock Time LOCK Switching characteristics table for CY2305CSXC-1H and CY2309CSXC-1H Commercial Temperature Devices. All parameters are specified with loaded outputs. Parameter Name t Output Frequency 1 [6] ÷ Output Duty Cycle = t ...

Page 6

... Switching characteristics table for CY2305CSXC-1H and CY2309CSXC-1H Commercial Temperature Devices. All parameters are specified with loaded outputs. Parameter Name t Delay, REF Rising Edge to 6A [6] CLKOUT Rising Edge t Delay, REF Rising Edge to 6B [6] CLKOUT Rising Edge [6] t Device to Device Skew 7 [6] t Output Slew Rate ...

Page 7

... Switching characteristics table for CY2305CSXI-1H, CY2305CSXA-1H and CY2309CSXI-1H Industrial / Automotive-A Temperature Device. All parameters are specified with loaded outputs. Parameter Name t Delay, REF Rising Edge to 6B [6] CLKOUT Rising Edge [6] t Device to Device Skew 7 [6] t Output Slew Rate 8 [6] t Cycle to Cycle Jitter, peak ...

Page 8

... Document Number: 38-07672 Rev. *G Figure 7. Device-Device Skew Test Circuit # 0.1 μ F CLK out C LOAD V DD 0.1 μ F GND For parameter t (output slew rate) on -1H devices 8 CY2305C CY2309C 1 kΩ OUTPUTS kΩ GND Page [+] Feedback [+] Feedback ...

Page 9

... Ordering Information Ordering Code Pb-Free - CY2305C CY2305CSXC-1 8-pin 150 Mil SOIC CY2305CSXC-1T 8-pin 150 Mil SOIC – Tape and Reel CY2305CSXC-1H 8-pin 150 Mil SOIC CY2305CSXC-1HT 8-pin 150 Mil SOIC – Tape and Reel CY2305CSXI-1 8-pin 150 Mil SOIC CY2305CSXI-1T 8-pin 150 Mil SOIC – Tape and Reel ...

Page 10

... SEATING PLANE 0.061[1.549] 0.068[1.727] 0.004[0.102] 0°~8° 0.004[0.102] 0.0098[0.249] CY2305C CY2309C MAX. PART # 0.010[0.254] X 45° 0.016[0.406] 0.0075[0.190] 0.016[0.406] 0.0098[0.249] 0.035[0.889] 51-85066-*C MAX ...

Page 11

... Document Number: 38-07672 Rev. *G PIN 1 ID DIMENSIONS IN MM[INCHES] MIN. REFERENCE JEDEC MO-153 6.25[0.246] PACKAGE WEIGHT 0.05gms 6.50[0.256] 0.25[0.010] 1.10[0.043] MAX. BSC GAUGE 0°-8° PLANE 0.076[0.003] SEATING PLANE CY2305C CY2309C MAX. 0.50[0.020] 0.09[[0.003] 0.70[0.027] 0.20[0.008] 51-85091-*A Page [+] Feedback [+] Feedback ...

Page 12

... Document History Page Document Title: CY2305C CY2309C 3.3V Zero Delay Clock Buffer Document Number: 38-07672 Orig. of REV. ECN NO. Issue Date Change ** 224421 See ECN *A 268571 See ECN *B 276453 See ECN *C 303063 See ECN *D 318315 See ECN *E 344815 See ECN *F 1279889 See ECN ...

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