TC655 Microchip Technology Inc., TC655 Datasheet - Page 19

• Manufacturer Part Number: TC655
• Description: Dual Smbus Pwm Fan Speed Controllers With Fan Fault Detection
• Manufacturer: Microchip Technology Inc.

6.3
The Configuration Register is an 8-bit read/writable
multi-function control register. This register allows the
user to clear fan faults, select RPM resolution, select
REGISTER 6-3:
2002 Microchip Technology Inc.
CONFIGURATION REGISTER
(CONFIG)
bit 7
bit 6
bit 5
bit 4-3
bit 2-1
bit 0
CONFIGURATION REGISTER (CONFIG)
bit 7
FFCLR: Fan Fault Clear
1 = Clear Fan Fault. This will reset the Fan Fault bits in the Status Register and the FAULT
0 = Normal Operation (default)
RES: Resolution Selection for RPM Output Registers
1 = RPM Output Registers (RPM1 & RPM2) will be set for 25 RPM (9-bit) resolution.
0 = RPM Output Registers (RPM1 & RPM2) will be set for 50 RPM (8-bit) resolution. (default)
DUTYC: Duty-Cycle Control Method
1 = The V
0 = The V
F2PPR: Fan 2 Pulses Per Rotation
The TC654/TC655 device uses this setting to understand how many current pulses per revolu-
tion Fan 2 should have. It then uses this as part of the calculation for the fan 2 RPM value in
the RPM2 Register. See Section 7.7 for application information on determining your fan’s
number of current pulses per revolution.
00 = 1
01 = 2 (default)
10 = 4
11 = 8
F1PPR: Fan 1 Pulses Per Rotation
The TC654/TC655 device uses this setting to understand how many current pulses per revolu-
tion Fan 1 should have. It then uses this as part of the calculation for the fan 1 RPM value for
the RPM1 Register. See Section 7.7 for application information on determining your fan’s
number of current pulses per revolution.
00 = 1
01 = 2 (default)
10 = 4
11 = 8
SDM: Shutdown Mode
1 = Shutdown Mode. See Section 4.9 for more information on low power shutdown mode.
0 = Normal Operation. (default)
Legend:
R = Readable bit
-n = Value at POR
FFCLR
R/W-0
output.
duty-cycle will be taken from the duty-cycle register (DUTY_CYCLE).
value will be between 30% and 100% for V
the V
(default)
IN
OUT
OUT
pin is open when this mode is selected, the V
R/W-0
RES
duty-cycle will be controlled via the SMBus interface. The value for the V
duty-cycle will be controlled via the V
DUTYC
R/W-0
W = Writable bit
’1’ = Bit is set
F2PPR
R/W-0
V
fan current pulses per rotation for fans 1 & 2 (for fan
RPM calculation) and put the TC654/TC655 device into
a shutdown mode to save power consumption. See
Register 6-3 below for the Configuration Register bit
descriptions.
OUT
duty cycle (fan speed) control method, select the
IN
F2PPR
R/W-1
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
values between 1.62 V and 2.6 V typical. If
IN
analog input pin. The V
OUT
TC654/TC655
duty-cycle will default to 39.33%.
F1PPR
R/W-0
x = Bit is unknown
F1PPR
R/W-1
DS21734A-page 19
OUT
duty-cycle
R/W-0
SDM
OUT
bit 0