EMC2301 Standard Microsystems Corp., EMC2301 Datasheet - Page 35

• Manufacturer Part Number: EMC2301
• Description: Rpm-based Pwm Fan Controller
• Manufacturer: Standard Microsystems Corp.

RPM-Based PWM Fan Controller
Datasheet
SMSC EMC2301
5.15
5.16
ADDR
ADDR
3Ah
3Bh
39h
R/W
R/W
R/W
R/W
R/W
During normal operation, if the fan stops for any reason (including low drive), the RPM-based Fan
Speed Control Algorithm will attempt to restart the fan. Setting the Fan Minimum Drive Register to a
setting that will maintain fan operation is a useful way to avoid potential fan oscillations as the control
circuitry attempts to drive it at a level that cannot support fan operation.
The Fan Minimum Drive Register is software locked.
The Valid TACH Count register stores the maximum TACH Reading Register value to indicate that the
fan is spinning properly. The value is referenced at the end of the Spin Up Routine to determine if the
fan has started operating and decide if the device needs to retry. See
translating the count to an RPM.
If the TACH Reading Register value exceeds the Valid TACH Count Register (indicating that the Fan
RPM is below the threshold set by this count), then a stalled fan is detected. In this condition, the
algorithm will automatically begin its Spin Up Routine.
If a TACH Target setting is set above the Valid TACH Count setting, then that setting will be ignored
and the algorithm will use the current fan drive setting.
The Valid TACH Count register is software locked.
The Fan Drive Fail Band Registers store the number of tach counts used by the Fan Drive Fail
detection circuitry. This circuitry is activated when the fan drive setting high byte is at FFh. When it is
enabled, the actual measured fan speed is compared against the target fan speed. These registers
are only used when the FSC is active.
This circuitry is used to indicate that the target fan speed at full drive is higher than the fan is actually
capable of reaching. If the measured fan speed does not exceed the target fan speed minus the Fan
Drive Fail Band Register settings for a period of time longer than set by the DRIVE_FAIL_CNTx[1:0]
bits, then the DRIVE_FAIL status bit will be set and an interrupt generated.
Valid TACH Count Register
Fan Drive Fail Band Registers
Valid TACH
REGISTER
Count
REGISTER
Fan Drive
High Byte
Fail Band
Fail Band
Low Byte
Fan Drive
4096
Table 5.26 Fan Drive Fail Band Registers
B7
Table 5.25 Valid TACH Count Register
4096
B7
16
2048
B6
2048
B6
DATASHEET
8
1024
B5
1024
B5
35
4
512
B4
512
B4
2
256
B3
256
B3
1
128
B2
128
B2
-
Equation [2]
B1
64
B1
64
-
Revision 1.2 (03-22-10)
B0
32
B0
32
-
in
Section 5.18
DEFAULT
DEFAULT
F5h
00h
00h
for