NCV4276 ON Semiconductor, NCV4276 Datasheet - Page 14

• Manufacturer Part Number: NCV4276
• Description: 5.0v, 3.3v, 2.5v, 1.8v/400ma W/ Enable, W/ 2% Or 4% Output Voltage Accuracy Ldo
• Manufacturer: ON Semiconductor

Circuit Description
provides a regulated voltage at 400 mA to the output. It is
enabled with an input to the inhibit pin. The regulator
voltage is provided by a PNP pass transistor controlled by
an error amplifier with a bandgap reference, which gives it
the lowest possible dropout voltage. The output current
capability is 400 mA, and the base drive quiescent current
is controlled to prevent oversaturation when the input
voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal
shutdown. Thermal shutdown occurs above 150°C to
protect the IC during overloads and extreme ambient
temperatures.
Regulator
sample of the output voltage (V
PNP series pass transistor via a buffer. The reference is a
bandgap design to give it a temperature-stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Oversaturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized. See Figure 5, Test Circuit, for
circuit element nomenclature illustration.
Regulator Stability Considerations
stabilize the input impedance to avoid voltage line
influences. Using a resistor of approximately 1.0 W in
series with C
stray inductance and capacitance.
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
temperature constraints. The aluminum electrolytic
capacitor is the least expensive solution, but, if the circuit
operates at low temperatures (-25°C to -40°C), both the
value and ESR of the capacitor will vary considerably. The
capacitor manufacturer's data sheet usually provides this
information.
The NCV4276 is an integrated low dropout regulator that
The error amplifier compares the reference voltage to a
The input capacitors (C
The output capacitor helps determine three main
I2
can stop potential oscillations caused by
I1
and C
Q
) and drives the base of a
I2
) are necessary to
NCV4276, NCV4276A
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14
should work for most applications; however, it is not
necessarily the optimized solution. Stability is guaranteed
for C
Adjustable regulator and C
for the 1.8 V, 2.5 V, and 3.3 V regulators. See Figures 5 and
6 for output stability at various load and capacitive ESR
conditions.
Inhibit Input
holding the pin down to a voltage less than 0.5 V, the output
of the regulator will be turned off. When the voltage on the
Inhibit pin is greater than 3.5 V, the output of the regulator
will be enabled to power its output to the regulated output
voltage. The inhibit pin may be connected directly to the
input pin to give constant enable to the output regulator.
Setting the Output Voltage (Adjustable Version)
set between 2.5 V and 20 V (Figure ). This is accomplished
with an external resistor divider feeding back the voltage
to the IC back to the error amplifier by the voltage adjust
pin VA. The internal reference voltage is set to a
temperature stable reference of 2.5 V.
formula. Ignoring the bias current into the VA pin:
due to VA bias current.
an output voltage of 2.5 V.
during the design phase.
adjustable version is between (V
Internal bias requirements dictate a minimum input voltage
of 4.5 V. The dropout voltage for output voltages less than
4.0 V is (4.5 V - V
The value for the output capacitor C
The inhibit pin is used to turn the regulator on or off. By
The output voltage range of the adjustable version can be
The output voltage is calculated from the following
Use R2 < 50 k to avoid significant voltage output errors
Connecting VA directly to Q without R1 and R2 creates
Designers should consider the tolerance of R1 and R2
The input voltage range for operation (pin 1) of the
Q
w 22 mF and an ESR v 2.5 W for the 5.0 V and
V Q + [(R1 ) R2) * V ref ] R2
Q
).
Q
w 10 mF and an ESR v 1.8 W
Q
+ 0.5 V) and 40 V.
Q
, shown in Figure 3,